>>> On 07.04.16 at 13:57, <andrew.coop...@citrix.com> wrote:
> + deps = {
> + # FPU is taken to mean support for the x87 regisers as well as the
> + # instructions. MMX is documented to alias the %MM registers over
> the
> + # x87 %ST registers in hardware.
> + FPU: [MMX],
> +
> + # The PSE36 feature indicates that reserved bits in a PSE superpage
> + # may be used as extra physical address bits.
> + PSE: [PSE36],
> +
> + # Entering Long Mode requires that %CR4.PAE is set. The NX and PKU
> + # pagetable bits are only representable in the 64bit PTE format
> + # offered by PAE.
> + PAE: [LM, NX, PKU],
PKU is explicitly documented to be available only in IA-32e paging,
so I think it should be listed as a dependent of LM.
Jan
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