On 16/04/2016 18:39, Dirk Behme wrote:
Hi Julien,
Hi Dirk,
On 06.04.2016 12:48, Julien Grall wrote:
On 04/04/2016 16:44, Dirk Behme wrote:
Hi Julien,
I'm using
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/r8a7795.dtsi#n134
The special thing here is that it has the offsets 0x10000, 0x20000,
0x40000 and 0x60000. Instead of the standard ones 0x1000, 0x2000, 0x4000
and 0x6000.
Those offsets are normal, this platform seems to have a GIC using
64KB-aligned region rather than the classic 4KB-aligned one.
Now, just by try & error, using [1] makes things working.
I'm not sure why this changes anything, though:
* To my understanding, the GIC register ranges are max 0x1000. So I'd
think that the 0x2000 should be sufficient to map all necessary registers.
* I haven't observed any MMU fault. So it didn't look like any
non-mapped register was accessed without this change.
Xen is checking if the platform is using an aliased GIC when the CPU
interface size is 128KB (see gicv2_is_aliased and commit
21550029f709072aacf3b90edd574e7d3021b400).
If you see "GICv2: Adjusting CPU interface base to..." then your GIC is
aliased.
In any case, the device-tree does not correctly describe the hardware on
your platform. Can you send a patch to fix the upstream device-tree?
Regards,
--
Julien Grall
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