On Tue, 7 Jun 2016, Julien Grall wrote: > The ARM erratum applies to certain revisions of Cortex-A57. The > processor may report a Stage 2 translation fault as the result of > Stage 1 fault for load crossing a page boundary when there is a > permission fault or device memory fault at stage 1 and a translation > fault at Stage 2. > > So Xen needs to check that Stage 1 translation does not generate a fault > before handling the Stage 2 fault. If it is a Stage 1 translation fault, > return to the guest to let the processor injecting the correct fault. ^let the process inject (let somebody do something)
> Only document it as this is already the behavior of the fault handlers. > Note that some optimization could be done to avoid unnecessary translation > fault. This is because HPFAR_EL2 is valid for more use case. For the moment, > the code is left unmodified. > > Signed-off-by: Julien Grall <julien.gr...@arm.com> Acked-by: Stefano Stabellini <sstabell...@kernel.org> > --- > Changes in v3: > - s/unecessary/unnecessary > - Rationalize the comment in the code. The full description can > be found either in the errata document or in the commit message. > --- > docs/misc/arm/silicon-errata.txt | 1 + > xen/arch/arm/traps.c | 8 ++++++++ > 2 files changed, 9 insertions(+) > > diff --git a/docs/misc/arm/silicon-errata.txt > b/docs/misc/arm/silicon-errata.txt > index 4b2c7c6..d620c2e 100644 > --- a/docs/misc/arm/silicon-errata.txt > +++ b/docs/misc/arm/silicon-errata.txt > @@ -47,3 +47,4 @@ stable hypervisors. > | ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 > | > | ARM | Cortex-A57 | #852523 | N/A > | > | ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 > | > +| ARM | Cortex-A57 | #834220 | N/A > | > diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c > index 175033b..757be27 100644 > --- a/xen/arch/arm/traps.c > +++ b/xen/arch/arm/traps.c > @@ -2394,6 +2394,10 @@ static void do_trap_instr_abort_guest(struct > cpu_user_regs *regs, > .kind = hsr.iabt.s1ptw ? npfec_kind_in_gpt : npfec_kind_with_gla > }; > > + /* > + * Erratum #834220: Check Stage 1 translation does not generate > + * a fault first! > + */ > if ( hsr.iabt.s1ptw ) > gpa = get_faulting_ipa(); > else > @@ -2443,6 +2447,10 @@ static void do_trap_data_abort_guest(struct > cpu_user_regs *regs, > info.gva = READ_SYSREG64(FAR_EL2); > #endif > > + /* > + * Erratum #834220: Check Stage 1 translation does not generate > + * a fault first! > + */ > if ( dabt.s1ptw ) > info.gpa = get_faulting_ipa(); > else > -- > 1.9.1 > _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel