added support to save/restore arm64 registers
Signed-off-by: Chenxiao Zhao <chenxiao.z...@gmail.com>
diff --git a/xen/arch/arm/hvm.c b/xen/arch/arm/hvm.c
index aee3353..3073b17 100644
--- a/xen/arch/arm/hvm.c
+++ b/xen/arch/arm/hvm.c
@@ -120,7 +120,8 @@ static int cpu_save(struct domain *d,
hvm_domain_context_t *h)
ctxt.dfar = v->arch.dfar;
ctxt.dfsr = v->arch.dfsr;
#else
- /* XXX 64-bit */
+ ctxt.far = v->arch.far;
+ ctxt.esr = v->arch.esr;
#endif
#ifdef CONFIG_ARM_32
@@ -199,7 +200,8 @@ static int cpu_load(struct domain *d,
hvm_domain_context_t *h)
v->arch.dfar = ctxt.dfar;
v->arch.dfsr = ctxt.dfsr;
#else
- /* XXX 64-bit */
+ v->arch.far = ctxt.far;
+ v->arch.esr = ctxt.esr;
#endif
#ifdef CONFIG_ARM_32
diff --git a/xen/include/public/arch-arm/hvm/save.h
b/xen/include/public/arch-arm/hvm/save.h
index db916b1..80330dc 100644
--- a/xen/include/public/arch-arm/hvm/save.h
+++ b/xen/include/public/arch-arm/hvm/save.h
@@ -46,16 +46,26 @@ DECLARE_HVM_SAVE_TYPE(HEADER, 1, struct
hvm_save_header);
struct hvm_hw_cpu
{
+#ifdef CONFIG_ARM_32
uint64_t vfp[34]; /* Vector floating pointer */
/* VFP v3 state is 34x64 bit, VFP v4 is not yet supported */
+#else
+ uint64_t vfp[66];
+#endif
/* Guest core registers */
struct vcpu_guest_core_regs core_regs;
- uint32_t sctlr, ttbcr;
+ uint32_t sctlr;
+#ifdef CONFIG_ARM_32
+ uint32_t ttbcr;
+#else
+ uint64_t ttbcr;
+#endif
uint64_t ttbr0, ttbr1;
uint32_t ifar, dfar;
+ uint64_t far, esr;
uint32_t ifsr, dfsr;
uint32_t dacr;
uint64_t par;
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