Hi Jan,
Thanks for your reply.
Qemu-xen seems that has problem for support 8G large Bar.
I think this patch is not perfect:
https://xenbits.xen.org/gitweb/?p=qemu-xen.git;a=commitdiff;h=aabc8530c7ba2be89e21463f051056ad7c255e6e
Because I found upper 32bit bar of 8G large bar was not register.
xen_pt_config_init.c:456 xen_pt_bar_reg_write
case XEN_PT_BAR_FLAG_UPPER:
bar_emu_mask = XEN_PT_BAR_ALLF;
bar_ro_mask = r_size ? r_size - 1 : 0;
break;
r_size is always 0. So, bar_sz_upper is always 0xffffffff, regardless of
whether 64 bit BAR size is larger than 4G.
With Konrad 's help , I find a patch at qemu-xen-trad about sorppurt BAR size
is larger than 4G, I will analyze this patch and see if it helps to me.
Feng
-----邮件原件-----
发件人: Jan Beulich [mailto:jbeul...@suse.com]
发送时间: 2016年8月11日 17:35
收件人: Gaofeng (GaoFeng, Euler)
抄送: george.dun...@eu.citrix.com; Fanhenglong; Hanweidong (Randy); Lianxueguo
(Albert); Huangpeng (Peter); xen-devel@lists.xen.org
主题: Re: [Xen-devel] xen does not support the 8G large bar
>>> On 11.08.16 at 05:30, <visen....@huawei.com> wrote:
> According to the analysis hvmloader code, find a problem:
>
> if (is_64bar) {
> bar_data_upper = pci_readl(devfn, bar_reg + 4);
> pci_writel(devfn, bar_reg + 4, ~0);
> bar_sz_upper = pci_readl(devfn, bar_reg + 4);
> pci_writel(devfn, bar_reg + 4, bar_data_upper);
> bar_sz = (bar_sz_upper << 32) | bar_sz;
> }
> bar_sz &= ~(bar_sz - 1);
>
> read from the pci device, bar_sz_upper is 0xffffffff, if the bar size
> is 8G, the bar_sz_upper should be 0xfffffffe.
But that doesn't indicate a problem with hvmloader. Instead that tells you that
qemu isn't behaving correctly. First thing for you to do is probably to try a
newer qemu, or otherwise see whether you can figure why qemu sends back
0xffffffff in this case (perhaps by adding a little bit of logging to the
respective code).
Jan
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