On 09/12/2016 08:26 AM, Jan Beulich wrote:
>>>> On 09.09.16 at 18:32, <joao.m.mart...@oracle.com> wrote:
>> Would that sound reasonable - am I overlooking something? To some extent this
>> might also applicable to the general case, although platform timer is now 
>> only
>> used for initial seeding so probably a non-visible issue.
> 
> Wouldn't it already help to simply make TSC a 62- or 63-bit counter,
> masking off the high bit(s) during reads?

Yeap - That indeed would be the simplest solution, as we currently mask out the
difference between stamps. Tested it and changed counter_bits to be 63 (amended
in patch 2).

Joao

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