Hello,

On 11/11/16 11:35, Andrii Anisov wrote:
Sorry for the late intrusion into this discussion. I would introduce my
vision of the issues behind the 32 bits addressing DMA controllers in
ARMv7/v8 SoCs.

    On AArch64 SoCs, some IPs may only have the capability to access
    32 bits address space. The physical memory assigned for Dom0 maybe
    not in 4GB address space, then the IPs will not work properly.
    So need to allocate memory under 4GB for Dom0.

IMHO that is a wrong approach. Unfortunately the problem is much bigger.
Normally you would need to run guest domains as well. With at least PV
Block and PV NET drivers. Due to the fact that PV drivers made in a way
that DMA controller at last will work with DomU's pages, those pages
should be from below 4GB.
So any DomU running PV drivers should have some amount of pages from
below 4GB. Moreover, the OS running in DomU should be knowing that only
those pages are DMA-able, and that PV drivers should be working with
DMA-able pages only: I.e. pages should be mapped correspondingly into
different banks under and over 4GB.

From my understanding of what you say, the problem is not because domU is using memory above 4GB but the fact that the backend driver does not take the right decision (e.g using bounce buffer when required).

The guest should be IPA agnostic and not care how the physical device is working when using PV drivers. So for me, this should be fixed in the DOM0 OS.

Regards,

--
Julien Grall

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