... to clarify that the register state does not get altered (behind the
back of the emulator).

Signed-off-by: Jan Beulich <jbeul...@suse.com>

--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -2006,7 +2006,7 @@ static void vmx_vcpu_update_vmfunc_ve(st
     vmx_vmcs_exit(v);
 }
 
-static int vmx_vcpu_emulate_vmfunc(struct cpu_user_regs *regs)
+static int vmx_vcpu_emulate_vmfunc(const struct cpu_user_regs *regs)
 {
     int rc = X86EMUL_EXCEPTION;
     struct vcpu *curr = current;
--- a/xen/include/asm-x86/hvm/hvm.h
+++ b/xen/include/asm-x86/hvm/hvm.h
@@ -208,7 +208,7 @@ struct hvm_function_table {
     void (*altp2m_vcpu_update_p2m)(struct vcpu *v);
     void (*altp2m_vcpu_update_vmfunc_ve)(struct vcpu *v);
     bool_t (*altp2m_vcpu_emulate_ve)(struct vcpu *v);
-    int (*altp2m_vcpu_emulate_vmfunc)(struct cpu_user_regs *regs);
+    int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs);
 
     /*
      * Parameters and callbacks for hardware-assisted TSC scaling,



x86/HVM: constify VMFUNC emulation hook

... to clarify that the register state does not get altered (behind the
back of the emulator).

Signed-off-by: Jan Beulich <jbeul...@suse.com>

--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -2006,7 +2006,7 @@ static void vmx_vcpu_update_vmfunc_ve(st
     vmx_vmcs_exit(v);
 }
 
-static int vmx_vcpu_emulate_vmfunc(struct cpu_user_regs *regs)
+static int vmx_vcpu_emulate_vmfunc(const struct cpu_user_regs *regs)
 {
     int rc = X86EMUL_EXCEPTION;
     struct vcpu *curr = current;
--- a/xen/include/asm-x86/hvm/hvm.h
+++ b/xen/include/asm-x86/hvm/hvm.h
@@ -208,7 +208,7 @@ struct hvm_function_table {
     void (*altp2m_vcpu_update_p2m)(struct vcpu *v);
     void (*altp2m_vcpu_update_vmfunc_ve)(struct vcpu *v);
     bool_t (*altp2m_vcpu_emulate_ve)(struct vcpu *v);
-    int (*altp2m_vcpu_emulate_vmfunc)(struct cpu_user_regs *regs);
+    int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs);
 
     /*
      * Parameters and callbacks for hardware-assisted TSC scaling,
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