On 13/01/17 15:32, Jan Beulich wrote: > --- a/xen/arch/x86/x86_emulate/x86_emulate.c > +++ b/xen/arch/x86/x86_emulate/x86_emulate.c > @@ -1355,6 +1355,7 @@ static bool vcpu_has( > #define vcpu_has_cr8_legacy() vcpu_has(0x80000001, ECX, 4, ctxt, ops) > #define vcpu_has_lzcnt() vcpu_has(0x80000001, ECX, 5, ctxt, ops) > #define vcpu_has_misalignsse() vcpu_has(0x80000001, ECX, 7, ctxt, ops) > +#define vcpu_has_tbm() vcpu_has(0x80000001, ECX, 21, ctxt, ops) > #define vcpu_has_bmi1() vcpu_has( 7, EBX, 3, ctxt, ops) > #define vcpu_has_hle() vcpu_has( 7, EBX, 4, ctxt, ops) > #define vcpu_has_bmi2() vcpu_has( 7, EBX, 8, ctxt, ops) > @@ -6014,6 +6015,85 @@ x86_emulate( > asm ( "rorl %b1,%k0" : "=g" (dst.val) : "c" (imm1), "0" > (src.val) ); > break; > > + case X86EMUL_OPC(0x8f09, 0x01): /* XOP Grp1 */
Surely this calls for the introduction of X86EMUL_OPC_XOP_* to match their VEX/EVEX counterparts? ~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
