On Tue, 14 Feb 2017, Julien Grall wrote: > Hi Stefano, > > On 02/14/2017 12:59 AM, Stefano Stabellini wrote: > > On Mon, 30 Jan 2017, Andre Przywara wrote: > > > static int its_map_baser(void __iomem *basereg, uint64_t regc, int > > > nr_items) > > > @@ -150,6 +191,11 @@ int gicv3_its_init(struct host_its *hw_its) > > > } > > > } > > > > > > + hw_its->cmd_buf = its_map_cbaser(hw_its); > > > + if ( !hw_its->cmd_buf ) > > > + return -ENOMEM; > > > + writeq_relaxed(0, hw_its->its_base + GITS_CWRITER); > > > > Why this new write? > > This was requested by me. From the spec (8.19.5 in ARM IHI 0069C), the > reset value of GITS_CWRITER is unknown. So we have to reset the register > to 0 otherwise the ITS may try to read invalid command as soon as it has > been enabled. > > FWIW, GITS_CREADR was reset to 0 by the ITS when GITS_CBASER has > successfully been written (see 8.19.2).
All right, thanks _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
