> From: Jan Beulich <jbeul...@suse.com>
> Sent: Tuesday, August 3, 2021 7:14 PM
>
> While for 5500 and 5520 chipsets only B3 and C2 are mentioned in the
> spec update, X58's also mentions B2, and searching the internet suggests
> systems with this stepping are actually in use. Even worse, for X58
> erratum #69 is marked applicable even to C2. Split the check to cover
> all applicable steppings and to also report applicable errata numbers in
> the log message. The splitting requires using the DMI port instead of
> the System Management Registers device, but that's then in line (also
> revision checking wise) with the spec updates.
>
> Fixes: 6890cebc6a98 ("VT-d: deal with 5500/5520/X58 errata")
> Signed-off-by: Jan Beulich <jbeul...@suse.com>
Reviewed-by: Kevin Tian <kevin.t...@intel.com>
> ---
> As to disabling just interrupt remapping (as the initial version of the
> original patch did) vs disabling the IOMMU as a whole: Using a less
> heavy workaround would of course be desirable, but then we need to
> ensure not to misguide the tool stack about the state of the system. It
> uses the PHYSCAP_directio sysctl output to determine whether PCI pass-
> through can be made use of, yet that flag is driven by "iommu_enabled"
> alone, without regard to the setting of "iommu_intremap".
>
> --- a/xen/drivers/passthrough/vtd/quirks.c
> +++ b/xen/drivers/passthrough/vtd/quirks.c
> @@ -268,26 +268,42 @@ static int __init parse_snb_timeout(cons
> }
> custom_param("snb_igd_quirk", parse_snb_timeout);
>
> -/* 5500/5520/X58 Chipset Interrupt remapping errata, for stepping B-3.
> - * Fixed in stepping C-2. */
> +/*
> + * 5500/5520/X58 chipset interrupt remapping errata, for steppings B2 and
> B3.
> + * Fixed in stepping C2 except on X58.
> + */
> static void __init tylersburg_intremap_quirk(void)
> {
> - uint32_t bus, device;
> + unsigned int bus;
> uint8_t rev;
>
> for ( bus = 0; bus < 0x100; bus++ )
> {
> - /* Match on System Management Registers on Device 20 Function 0 */
> - device = pci_conf_read32(PCI_SBDF(0, bus, 20, 0), PCI_VENDOR_ID);
> - rev = pci_conf_read8(PCI_SBDF(0, bus, 20, 0), PCI_REVISION_ID);
> + /* Match on DMI port (Device 0 Function 0) */
> + rev = pci_conf_read8(PCI_SBDF(0, bus, 0, 0), PCI_REVISION_ID);
>
> - if ( rev == 0x13 && device == 0x342e8086 )
> + switch ( pci_conf_read32(PCI_SBDF(0, bus, 0, 0), PCI_VENDOR_ID) )
> {
> + default:
> + continue;
> +
> + case 0x34038086: case 0x34068086:
> + if ( rev >= 0x22 )
> + continue;
> printk(XENLOG_WARNING VTDPREFIX
> - "Disabling IOMMU due to Intel 5500/5520/X58 Chipset
> errata #47,
> #53\n");
> - iommu_enable = 0;
> + "Disabling IOMMU due to Intel 5500/5520 chipset errata
> #47 and
> #53\n");
> + iommu_enable = false;
> + break;
> +
> + case 0x34058086:
> + printk(XENLOG_WARNING VTDPREFIX
> + "Disabling IOMMU due to Intel X58 chipset %s\n",
> + rev < 0x22 ? "errata #62 and #69" : "erratum #69");
> + iommu_enable = false;
> break;
> }
> +
> + break;
> }
> }
>
