On 26.07.2022 17:42, Andrew Cooper wrote: > On 26/07/2022 16:33, Jan Beulich wrote: >> On 26.07.2022 17:28, Edwin Török wrote: >>> The latest Intel manual now says the X2APIC reserved range is only >>> 0x800 to 0x8ff (NOT 0xbff). >>> This changed between SDM 68 (Nov 2018) and SDM 69 (Jan 2019). >>> The AMD manual documents 0x800-0x8ff too. >>> >>> There are non-X2APIC MSRs in the 0x900-0xbff range now: >>> e.g. 0x981 is IA32_TME_CAPABILITY, an architectural MSR. >>> >>> The new MSR in this range appears to have been introduced in Icelake, >>> so this commit should be backported to Xen versions supporting Icelake. >>> >>> Backport: 4.13+ >> FAOD nevertheless it'll be applied only back to 4.15. > > It shouldn't go back before 4.16, because otherwise we start exposing a > bunch of MSRs (including undocumented ones on Haswell/Broadwell) which > were previously disallowed.
Hmm, I'm confused - how would the limiting of this range cause more MSRs to be exposed in 4.15? Jan
