Refer ARM DDI 0487G.b ID072021, EC==0b011000 is supported for Aarch64 state
only. Thus, vgic_v3_emulate_sysreg is enabled for CONFIG_ARM_64 only.
Signed-off-by: Ayan Kumar Halder <ayank...@amd.com>
---
Changes from -
v1 - 1. Updated the commit message.
xen/arch/arm/vgic-v3.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 015446be17..3f4509dcd3 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1519,6 +1519,7 @@ static bool vgic_v3_emulate_sgi1r(struct cpu_user_regs
*regs, uint64_t *r,
}
}
+#ifdef CONFIG_ARM_64
static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
{
struct hsr_sysreg sysreg = hsr.sysreg;
@@ -1539,6 +1540,7 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs
*regs, union hsr hsr)
return false;
}
}
+#endif
static bool vgic_v3_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
{
@@ -1562,8 +1564,10 @@ static bool vgic_v3_emulate_reg(struct cpu_user_regs
*regs, union hsr hsr)
{
switch (hsr.ec)
{
+#ifdef CONFIG_ARM_64
case HSR_EC_SYSREG:
return vgic_v3_emulate_sysreg(regs, hsr);
+#endif
case HSR_EC_CP15_64:
return vgic_v3_emulate_cp64(regs, hsr);
default:
--
2.17.1
