Hi Ayan, On 11/11/2022 15:17, Ayan Kumar Halder wrote: > One can now use GICv3 on AArch32 systems. However, ITS is not supported. > The reason being currently we are trying to validate GICv3 on an AArch32_v8R > system. Refer ARM DDI 0568A.c ID110520, B1.3.1, > "A Generic Interrupt Controller (GIC) implemented with an Armv8-R PE must not > implement LPI support." > > By default GICv3 is disabled on AArch32 and enabled on AArch64. > > Updated SUPPORT.md to state that GICv3 on Arm32 is not security supported. > > Signed-off-by: Ayan Kumar Halder <ayan.kumar.hal...@amd.com> Reviewed-by: Michal Orzel <michal.or...@amd.com>
with one remark... > --- > > Changed from :- > v1 - 1. Remove "ARM_64 || ARM_32" as it is always true. > 2. Updated SUPPORT.md. > > v2 - 1. GICv3 is enabled by default only on ARM_64. > 2. Updated SUPPORT.md. > > SUPPORT.md | 7 +++++++ > xen/arch/arm/Kconfig | 9 +++++---- > xen/arch/arm/include/asm/cpufeature.h | 1 + > 3 files changed, 13 insertions(+), 4 deletions(-) > > diff --git a/SUPPORT.md b/SUPPORT.md > index ab71464cf6..3f16d83191 100644 > --- a/SUPPORT.md > +++ b/SUPPORT.md > @@ -82,6 +82,13 @@ Extension to the GICv3 interrupt controller to support MSI. > > Status: Experimental > > +### ARM/GICv3 ... For me this section should go before the section ARM/GICv3 ITS. The reason being ITS is an extension and your section being generic should be listed before listing extension. ~Michal
