On 06.12.2022 11:59, Michal Orzel wrote: > --- a/xen/include/public/arch-x86_64.h > +++ b/xen/include/public/arch-x86_64.h > @@ -22,5 +22,5 @@ > * A similar callback occurs if the segment selectors are invalid. > * failsafe_address is used as the value of eip. > * > - * On x86_64, event_selector and failsafe_selector are ignored (???). > + * On x86_64, event_selector and failsafe_selector are ignored (?).
May I ask that this become (?!?) instead? > --- a/xen/include/xen/pci_regs.h > +++ b/xen/include/xen/pci_regs.h > @@ -246,13 +246,13 @@ > #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to > D3) */ > #define PCI_PM_CTRL_NO_SOFT_RESET 0x0008 /* No reset for D3hot->D0 */ > #define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */ > -#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */ > -#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */ > +#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (?) */ > +#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (?) */ > #define PCI_PM_CTRL_PME_STATUS 0x8000 /* PME pin status */ > -#define PCI_PM_PPB_EXTENSIONS 6 /* PPB support extensions (??) > */ > -#define PCI_PM_PPB_B2_B3 0x40 /* Stop clock when in D3hot (??) */ > -#define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) > */ > -#define PCI_PM_DATA_REGISTER 7 /* (??) */ > +#define PCI_PM_PPB_EXTENSIONS 6 /* PPB support extensions (?) */ > +#define PCI_PM_PPB_B2_B3 0x40 /* Stop clock when in D3hot (?) */ > +#define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (?) */ > +#define PCI_PM_DATA_REGISTER 7 /* (?) */ > #define PCI_PM_SIZEOF 8 We've inherited all of these from Linux, and I notice Linux still has it this same way. Ideally Linux would change first, but I'd be okay with a sentence added to the description clarifying that we knowingly accept the divergence. With the adjustments: Reviewed-by: Jan Beulich <jbeul...@suse.com> Jan
