xen/x86: prevent overflow with high frequency TSCs
Promote tsc_khz to a 64-bit type before multiplying by 1000 to avoid a
'overflow before widen' bug.
Otherwise just above 4.294GHz the value will overflow.
Processors with clocks this high are now in production and require this to work
correctly.
Signed-off-by: Neowutran <x...@neowutran.ovh>
---
Changed since v1:
* smaller commit message
* using uint64_t instead of u64
* added signed-off-by tag
---
xen/arch/x86/time.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c
index b01acd390d..c71e79e019 100644
--- a/xen/arch/x86/time.c
+++ b/xen/arch/x86/time.c
@@ -2585,7 +2585,7 @@ int tsc_set_info(struct domain *d,
case TSC_MODE_ALWAYS_EMULATE:
d->arch.vtsc_offset = get_s_time() - elapsed_nsec;
d->arch.tsc_khz = gtsc_khz ?: cpu_khz;
- set_time_scale(&d->arch.vtsc_to_ns, d->arch.tsc_khz * 1000);
+ set_time_scale(&d->arch.vtsc_to_ns, (uint64_t)d->arch.tsc_khz * 1000);
/*
* In default mode use native TSC if the host has safe TSC and
--
2.38.1
