> From: Roger Pau Monne <roger....@citrix.com> > Sent: Friday, July 28, 2023 5:57 PM > > So that the remapping entry can be updated atomically when possible. > > Doing such update atomically will avoid Xen having to mask the IO-APIC > pin prior to performing any interrupt movements (ie: changing the > destination and vector fields), as the interrupt remapping entry is > always consistent. > > This also simplifies some of the logic on both VT-d and AMD-Vi > implementations, as having the full RTE available instead of half of > it avoids to possibly read and update the missing other half from > hardware. > > While there remove the explicit zeroing of new_ire fields in > ioapic_rte_to_remap_entry() and initialize the variable at definition > so all fields are zeroed. Note fields could be also initialized with > final values at definition, but I found that likely too much to be > done at this time. > > Signed-off-by: Roger Pau Monné <roger....@citrix.com>
Reviewed-by: Kevin Tian <kevin.t...@intel.com>
