Re: [PATCH for 4.21 v6 1/2] xen/riscv: drop CONFIG_RISCV_ISA_RV64G

[Jan Beulich]

On 12.02.2025 17:50, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/Kconfig
> +++ b/xen/arch/riscv/Kconfig
> @@ -28,16 +28,6 @@ choice
>       help
>         This selects the base ISA extensions that Xen will target.
>  
> -config RISCV_ISA_RV64G
> -     bool "RV64G"
> -     help
> -       Use the RV64I base ISA, plus
> -       "M" for multiply/divide,
> -       "A" for atomic instructions,
> -       “F”/"D" for  {single/double}-precision floating-point instructions,
> -       "Zicsr" for control and status register access,
> -       "Zifencei" for instruction-fetch fence.
> -
>  endchoice

Shouldn't the choice be removed altogether then, for now being empty?

> --- a/xen/arch/riscv/arch.mk
> +++ b/xen/arch/riscv/arch.mk
> @@ -6,8 +6,13 @@ $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
>  riscv-abi-$(CONFIG_RISCV_32) := -mabi=ilp32
>  riscv-abi-$(CONFIG_RISCV_64) := -mabi=lp64
>  
> -riscv-march-$(CONFIG_RISCV_ISA_RV64G) := rv64g
> -riscv-march-$(CONFIG_RISCV_ISA_C)       := $(riscv-march-y)c
> +riscv-march-$(CONFIG_RISCV_64) := rv64
> +
> +riscv-march-y := $(riscv-march-y)ima
> +
> +riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
> +
> +riscv-march-y := $(riscv-march-y)_zicsr_zifencei

The repeated use of := makes this longer than necessary, and hence harder to
read. I understand using += isn't exactly ideal either, because then on the rhs
no blanks may appear (aiui), being kind of against our style and potentially
hampering readability. Still maybe:

riscv-march-$(CONFIG_RISCV_64) := rv64
riscv-march-y+=ima
riscv-march-$(CONFIG_RISCV_ISA_C)+=c
riscv-march-y+=_zicsr_zifencei

?

Jan