On Tue Jan 20, 2026 at 2:18 PM CET, Teddy Astie wrote:
> Hello,
>
> Le 20/01/2026 à 10:56, Alejandro Vallejo a écrit :
>> Add missing scaffolding to enable BusLock Threshold. That is:
>>
>> * Add general_intercepts_3.
>> * Add missing VMEXIT
>> * Adjust NPF perf counter base to immediately after the buslock counter
>>
>> Signed-off-by: Alejandro Vallejo <[email protected]>
>> ---
>> xen/arch/x86/hvm/svm/svm.c | 1 +
>> xen/arch/x86/hvm/svm/vmcb.h | 15 +++++++++++++--
>> xen/arch/x86/include/asm/hvm/svm.h | 2 ++
>> xen/arch/x86/include/asm/perfc_defn.h | 2 +-
>> 4 files changed, 17 insertions(+), 3 deletions(-)
>>
>> diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
>> index 5d23603fc1..9748df87d8 100644
>> --- a/xen/arch/x86/hvm/svm/svm.c
>> +++ b/xen/arch/x86/hvm/svm/svm.c
>> @@ -2524,6 +2524,7 @@ const struct hvm_function_table * __init
>> start_svm(void)
>> P(cpu_has_tsc_ratio, "TSC Rate MSR");
>> P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack");
>> P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation");
>> + P(cpu_has_bus_lock_thresh, "BusLock-Intercept Filter");
>> #undef P
>>
>> if ( !printed )
>> diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h
>> index ba554a9644..85e194f247 100644
>> --- a/xen/arch/x86/hvm/svm/vmcb.h
>> +++ b/xen/arch/x86/hvm/svm/vmcb.h
>> @@ -65,6 +65,11 @@ enum GenericIntercept2bits
>> GENERAL2_INTERCEPT_RDPRU = 1 << 14,
>> };
>>
>> +/* general 2 intercepts */
>
> nit, you want to says general 3 intercepts
I do. Well spotted
>
>> +enum GenericIntercept3bits
>> +{
>> + GENERAL3_INTERCEPT_BUS_LOCK_THRESH = 1 << 5,
>> +};
>>
>> /* control register intercepts */
>> enum CRInterceptBits
>> @@ -289,6 +294,7 @@ enum VMEXIT_EXITCODE
>> VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */
>> VMEXIT_XSETBV = 141, /* 0x8d */
>> VMEXIT_RDPRU = 142, /* 0x8e */
>> + VMEXIT_BUSLOCK = 165, /* 0xa5 */
>> /* Remember to also update VMEXIT_NPF_PERFC! */
>> VMEXIT_NPF = 1024, /* 0x400, nested paging fault */
>> /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */
>> @@ -405,7 +411,8 @@ struct vmcb_struct {
>> u32 _exception_intercepts; /* offset 0x08 - cleanbit 0 */
>> u32 _general1_intercepts; /* offset 0x0C - cleanbit 0 */
>> u32 _general2_intercepts; /* offset 0x10 - cleanbit 0 */
>> - u32 res01[10];
>> + u32 _general3_intercepts; /* offset 0x14 - cleanbit 0 */
>> + u32 res01[9];
>> u16 _pause_filter_thresh; /* offset 0x3C - cleanbit 0 */
>> u16 _pause_filter_count; /* offset 0x3E - cleanbit 0 */
>> u64 _iopm_base_pa; /* offset 0x40 - cleanbit 1 */
>> @@ -489,7 +496,10 @@ struct vmcb_struct {
>> u64 nextrip; /* offset 0xC8 */
>> u8 guest_ins_len; /* offset 0xD0 */
>> u8 guest_ins[15]; /* offset 0xD1 */
>> - u64 res10a[100]; /* offset 0xE0 pad to save area */
>> + u64 res10a[8]; /* offset 0xE0 */
>> + u16 bus_lock_thresh; /* offset 0x120 */
>> + u16 res10b[3]; /* offset 0x122 */
>> + u64 res10c[91]; /* offset 0x128 pad to save area */
>>
>> union {
>> struct segment_register sreg[6];
>> @@ -583,6 +593,7 @@ VMCB_ACCESSORS(dr_intercepts, intercepts)
>> VMCB_ACCESSORS(exception_intercepts, intercepts)
>> VMCB_ACCESSORS(general1_intercepts, intercepts)
>> VMCB_ACCESSORS(general2_intercepts, intercepts)
>> +VMCB_ACCESSORS(general3_intercepts, intercepts)
>> VMCB_ACCESSORS(pause_filter_count, intercepts)
>> VMCB_ACCESSORS(pause_filter_thresh, intercepts)
>> VMCB_ACCESSORS(tsc_offset, intercepts)
>> diff --git a/xen/arch/x86/include/asm/hvm/svm.h
>> b/xen/arch/x86/include/asm/hvm/svm.h
>> index a6d7e4aed3..14fe4abf96 100644
>> --- a/xen/arch/x86/include/asm/hvm/svm.h
>> +++ b/xen/arch/x86/include/asm/hvm/svm.h
>> @@ -37,6 +37,7 @@ extern u32 svm_feature_flags;
>> #define SVM_FEATURE_VGIF 16 /* Virtual GIF */
>> #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */
>> #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */
>> +#define SVM_FEATURE_BUS_LOCK_THRESH 29 /* Bus Lock Threshold */
>>
>> static inline bool cpu_has_svm_feature(unsigned int feat)
>> {
>> @@ -56,6 +57,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat)
>> #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE)
>> #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS)
>> #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL)
>> +#define cpu_has_bus_lock_thresh
>> cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK_THRESH)
>>
>> #define MSR_INTERCEPT_NONE 0
>> #define MSR_INTERCEPT_READ 1
>> diff --git a/xen/arch/x86/include/asm/perfc_defn.h
>> b/xen/arch/x86/include/asm/perfc_defn.h
>> index d6127cb91e..ac7439b992 100644
>> --- a/xen/arch/x86/include/asm/perfc_defn.h
>> +++ b/xen/arch/x86/include/asm/perfc_defn.h
>> @@ -7,7 +7,7 @@ PERFCOUNTER_ARRAY(exceptions, "exceptions", 32)
>> #ifdef CONFIG_HVM
>>
>> #define VMX_PERF_EXIT_REASON_SIZE 76
>> -#define VMEXIT_NPF_PERFC 143
>> +#define VMEXIT_NPF_PERFC 166
>> #define SVM_PERF_EXIT_REASON_SIZE (VMEXIT_NPF_PERFC + 1)
>> PERFCOUNTER_ARRAY(vmexits, "vmexits",
>> MAX(VMX_PERF_EXIT_REASON_SIZE,
>> SVM_PERF_EXIT_REASON_SIZE))
>
> With that changed, Reviewed-by: Teddy Astie <[email protected]>
Cheers,
Alejandro
