>>> On 13.09.18 at 08:30, <kevin.t...@intel.com> wrote: >> From: Jan Beulich [mailto:jbeul...@suse.com] >> Sent: Tuesday, September 11, 2018 9:16 PM >> >> Since strictly speaking it is incorrect for guest_walk_tables() to read >> L3 entries during PAE page walks, try to overcome this where possible by > > can you elaborate? why it's incorrect to read L3 entries?
Architectural behavior: In PAE mode they get read upon CR3 loads, not during page walks. >> pre-loading the values from hardware into the cache. Sadly the >> information is available in the EPT case only. On the positive side for >> NPT the spec spells out that L3 entries are actually read on walks, so >> us reading them is consistent with hardware behavior in that case. > > I'm a little bit confused about the description here. you change > VMX code but using NPT spec as the reference? I'm trying to explain why there not being a way to do the same on NPT is not only not a problem, but in line with hardware behavior. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
