On 24/10/18 14:00, Wei Liu wrote:
> On Mon, Oct 15, 2018 at 11:36:18AM +0100, Andrew Cooper wrote:
>> In particular, initialising %dr6 with the value 0 is buggy, because on
>> hardware supporting Transnational Memory, it will cause the sticky RTM bit to
> Typo "Transnational"

Yeah - I fixed all of them after Juergen noticed.

>
>> be asserted, even though a debug exception from a transaction hasn't actually
>> been observed.
>>
>> Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
>> Reviewed-by: Jan Beulich <jbeul...@suse.com>
>> ---
>> CC: Ian Jackson <ian.jack...@citrix.com>
>> CC: Wei Liu <wei.l...@citrix.com>
>> CC: Roger Pau Monné <roger....@citrix.com>
>>
>> The correct way to do this would be to get/modify/set the vcpu state, but it
>> turns out that is impossible for an HVM vcpu which hasn't yet had state set.
>> Fixing that is going to take some substantial untangling from implications in
>> the migration stream.
> Acked-by: Wei Liu <wei.l...@citrix.com>

Thanks.

>
> I haven't checked the manual re the value of dr6, but I trust Jan and
> Roger's review on this.

Intel Vol 3a Table 9-1, or AMD Vol 2 Table 14-1 for anyone who wants to
double check :)

~Andrew

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