> -----Original Message----- > From: Jan Beulich [mailto:jbeul...@suse.com] > Sent: 27 November 2018 13:02 > To: Paul Durrant <paul.durr...@citrix.com> > Cc: Brian Woods <brian.wo...@amd.com>; Suravee Suthikulpanit > <suravee.suthikulpa...@amd.com>; xen-devel <xen- > de...@lists.xenproject.org> > Subject: Re: [Xen-devel] [PATCH] amd-iommu: remove page merging code > > >>> On 26.11.18 at 18:30, <paul.durr...@citrix.com> wrote: > > The page merging logic makes use of bits 1-8 and bit 63 of a PTE, which > used > > to be specified as ignored. However, bits 5 and 6 are now specified as > > 'accessed' and 'dirty' bits and their use only remains safe as long as > > the DTE 'Host Access Dirty' bits remain clear. The code is also of > dubious > > benefit and was the subject XSA-275. > > > > This patch removes the code, freeing up the remaining PTE 'ignored' bits > > for other potential use and shortening the source by 170 lines. > > No word at all about the performance implications? Do you have > any plans to re-introduce properly working page recombining > code? I realize VT-d doesn't have any either (the maintainers at > some point in the distant past had promised to implement it, but > I guess that's long been forgotten), but anyway... >
I hope to wire through the order parameter to the implementations eventually, which is the right way to do things I think. It also means I'll probably need to tweak the PV-IOMMU interface to handle an order parameter before I send v.next too. Paul > Jan > _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
