On 1/23/19 3:47 AM, Roger Pau Monne wrote:
> The current check for the present bit is wrong, since the present bit
> is located in the low part of the entry.
>
> Fixes: e8afe1124cc1 ("iommu: elide flushing for higher order map/unmap
> operations")
> Signed-off-by: Roger Pau Monné <roger....@citrix.com>
Reviewed-by: Brian Woods <brian.wo...@amd.com>
> ---
> Cc: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
> Cc: Brian Woods <brian.wo...@amd.com>
> Cc: Juergen Gross <jgr...@suse.com>
> Cc: Paul Durrant <paul.durr...@citrix.com>
> ---
> xen/drivers/passthrough/amd/iommu_map.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/xen/drivers/passthrough/amd/iommu_map.c
> b/xen/drivers/passthrough/amd/iommu_map.c
> index 99ac0a6862..67329b0c95 100644
> --- a/xen/drivers/passthrough/amd/iommu_map.c
> +++ b/xen/drivers/passthrough/amd/iommu_map.c
> @@ -39,15 +39,13 @@ static unsigned int clear_iommu_pte_present(unsigned long
> l1_mfn,
> unsigned long dfn)
> {
> uint64_t *table, *pte;
> - uint32_t entry;
> unsigned int flush_flags;
>
> table = map_domain_page(_mfn(l1_mfn));
>
> pte = (table + pfn_to_pde_idx(dfn, 1));
> - entry = *pte >> 32;
>
> - flush_flags = get_field_from_reg_u32(entry, IOMMU_PTE_PRESENT_MASK,
> + flush_flags = get_field_from_reg_u32(*pte, IOMMU_PTE_PRESENT_MASK,
> IOMMU_PTE_PRESENT_SHIFT) ?
> IOMMU_FLUSHF_modified : 0;
>
>
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
