Newer AMD processors (F17h) have mwait support. Add some checks to make
sure vendor specific code is run correctly and some infrastructure to
facilitate adding AMD processors.
Signed-off-by: Brian Woods <brian.wo...@amd.com>
---
xen/arch/x86/cpu/mwait-idle.c | 25 +++++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index a063e39d60..1036c8b101 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -979,6 +979,13 @@ static const struct x86_cpu_id intel_idle_ids[]
__initconstrel = {
{}
};
+#define ACPU(family, model, cpu) \
+ { X86_VENDOR_AMD, family, model, X86_FEATURE_ALWAYS, &idle_cpu_##cpu}
+
+static const struct x86_cpu_id amd_idle_ids[] __initconstrel = {
+ {}
+};
+
/*
* ivt_idle_state_table_update(void)
*
@@ -1115,6 +1122,9 @@ static void __init sklh_idle_state_table_update(void)
*/
static void __init mwait_idle_state_table_update(void)
{
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+ return;
+
switch (boot_cpu_data.x86_model) {
case 0x3e: /* IVT */
ivt_idle_state_table_update();
@@ -1126,13 +1136,24 @@ static void __init mwait_idle_state_table_update(void)
case 0x5e: /* SKL-H */
sklh_idle_state_table_update();
break;
- }
+ }
}
static int __init mwait_idle_probe(void)
{
unsigned int eax, ebx, ecx;
- const struct x86_cpu_id *id = x86_match_cpu(intel_idle_ids);
+ const struct x86_cpu_id *id;
+
+ switch (boot_cpu_data.x86_vendor) {
+ case X86_VENDOR_INTEL:
+ id = x86_match_cpu(intel_idle_ids);
+ break;
+ case X86_VENDOR_AMD:
+ id = x86_match_cpu(amd_idle_ids);
+ break;
+ default:
+ id = NULL;
+ }
if (!id) {
pr_debug(PREFIX "does not run on family %d model %d\n",
--
2.11.0
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