On 19.07.2019 20:23, Woods, Brian wrote: > On Tue, Jul 16, 2019 at 04:36:06PM +0000, Jan Beulich wrote: >> Also introduce a field in struct amd_iommu caching the most recently >> written control register. All writes should now happen exclusively from >> that cached value, such that it is guaranteed to be up to date. >> >> Take the opportunity and add further fields. Also convert a few boolean >> function parameters to bool, such that use of !! can be avoided. >> >> Because of there now being definitions beyond bit 31, writel() also gets >> replaced by writeq() when updating hardware. >> >> Signed-off-by: Jan Beulich <jbeul...@suse.com> >> Acked-by: Andrew Cooper <andrew.coop...@citrix.com> > > Acked-by: Brian Woods <brian.wo...@amd.com>
Thanks for this and the other acks. I notice though that you skipped patches 2 and 13: Are there concerns there? Patch 8 still has a discussion to settle, so I realize you probably wouldn't want to ack that one yet. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
