> On 11 Sep 2020, at 14:11, Jan Beulich <jbeul...@suse.com> wrote:
>
> All,
>
> the releases are about due, but will of course want to wait for the
> XSA fixes going public on the 22nd. Please point out backports
> you find missing from the respective staging branches, but which
> you consider relevant. (Ian, Julien, Stefano: I notice there once
> again haven't been any tools or Arm side backports at all so far
> since the most recent stable releases from these branches. But
> maybe there simply aren't any.)
>
> One that I have queued already, but which first need to at least
> pass the push gate to master, are
>
> 8efa46516c5f hvmloader: indicate ACPI tables with "ACPI data" type in e820
> e5a1b6f0d207 x86/mm: do not mark IO regions as Xen heap
> b4e41b1750d5 b4e41b1750d5 [4.14 only]
>
> On the Arm side I'd also like to ask for
>
> 5d45ecabe3c0 xen/arm64: force gcc 10+ to always inline generic atomics helpers
+1
Could those fixes also be considered:
3b418b3326 arm: Add Neoverse N1 processor identification
858c0be8c2 xen/arm: Enable CPU Erratum 1165522 for Neoverse
1814a626fb xen/arm: Update silicon-errata.txt with the Neovers AT erratum
968bb86d04 xen/arm: Missing N1/A76/A75 FP registers in vCPU context switch
f4c1a541fa xen/arm: Throw messages for unknown FP/SIMD implement ID
Those are erratas and bug fixes.
Bertrand
