Hi Julien, > On 9 Dec 2020, at 23:17, Julien Grall <jul...@xen.org> wrote: > > Hi Bertrand, > > On 09/12/2020 16:31, Bertrand Marquis wrote: >> Activate TID3 bit in HSR register when starting a guest. > > s/HSR/HCR/ >
Right, I did it a lot thanks for the review. I will fix that in V4. >> This will trap all coprecessor ID registers so that we can give to guest >> values corresponding to what they can actually use and mask some >> features to guests even though they would be supported by the underlying >> hardware (like SVE or MPAM). > > So this will make sure the guest will not be able to identify the feature. > Did you check that the features are effectively not accessible by the guest? > IOW it should trap. For SVE yes I checked and with the serie a Linux kernel with SVE support activated on a target with SVE is now working (was crashing before). For MPAM, I have no target available with MPAM support so I could not test that but your recent XSA patch did turn the access to the guest off. With my SVE test, I could confirm that access are trapped and properly emulated. Cheers Bertrand > > Cheers, > > -- > Julien Grall >
