On 11.06.2021 18:36, Andrew Cooper wrote: > @@ -60,6 +65,11 @@ static void __init calculate_host_policy(void) > /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ > /* probe_cpuid_faulting() sanity checks presence of > MISC_FEATURES_ENABLES */ > mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; > + > + mp->arch_caps.raw &= > + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | > + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | > + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | > ARCH_CAPS_TAA_NO); > }
Isn't this a little too simple? For CPUID we consider the host policy to be what Xen is using. Taking ARCH_CAPS_SKIP_L1DFL as an example, we're not using it unconditionally (depending on opt_md_clear_hvm and opt_l1d_flush), i.e. there's command line control over its use just like there is over the CPUID bits. Or take ARCH_CAPS_RDCL_NO, which we set unilaterally for AMD/Hygon. I don't mind it remaining this simple for the moment, but then at least the commit message should state that this is currently over- simplifying things. If you agree, then with suitable wording added: Reviewed-by: Jan Beulich <jbeul...@suse.com> Jan
