Hi,
this patch removes GPFN_INV_MASK. VTi code now uses INVALID_MFN like pv.
This slightly simplify code and free a pte bit (more to come here).
Tristan.
# HG changeset patch
# User Tristan Gingold <[EMAIL PROTECTED]>
# Date 1204864887 -3600
# Node ID 2b050b0bc7a6dd697d1b1c9711fd345f9f621c58
# Parent 99ed430040909e7edd203893a18a72d0d8de1c52
Remove GPFN_INV_MASK.
This slightly simplify code and free a pte bit.
Signed-off-by: Tristan Gingold <[EMAIL PROTECTED]>
diff -r 99ed43004090 -r 2b050b0bc7a6 xen/arch/ia64/vmx/sioemu.c
--- a/xen/arch/ia64/vmx/sioemu.c Fri Mar 07 05:18:22 2008 +0100
+++ b/xen/arch/ia64/vmx/sioemu.c Fri Mar 07 05:41:27 2008 +0100
@@ -208,7 +208,7 @@ sioemu_add_io_physmap (struct domain *d,
for (i = start; i < start + size; i += PAGE_SIZE) {
unsigned long mpa;
mpa = ____lookup_domain_mpa(d, i);
- if (mpa != GPFN_INV_MASK && mpa != INVALID_MFN)
+ if (mpa != INVALID_MFN)
return -EBUSY;
}
diff -r 99ed43004090 -r 2b050b0bc7a6 xen/arch/ia64/xen/mm.c
--- a/xen/arch/ia64/xen/mm.c Fri Mar 07 05:18:22 2008 +0100
+++ b/xen/arch/ia64/xen/mm.c Fri Mar 07 05:41:27 2008 +0100
@@ -726,8 +726,6 @@ ____lookup_domain_mpa(struct domain *d,
if (pte_present(*pte))
return (pte->pte & _PFN_MASK);
- else if (VMX_DOMAIN(d->vcpu[0]))
- return GPFN_INV_MASK;
return INVALID_MFN;
}
@@ -742,8 +740,8 @@ unsigned long lookup_domain_mpa(struct d
if (entry != NULL)
p2m_entry_set(entry, pte, tmp_pte);
return pte_val(tmp_pte);
- } else if (VMX_DOMAIN(d->vcpu[0]))
- return GPFN_INV_MASK;
+ } else if (is_hvm_domain(d))
+ return INVALID_MFN;
}
if (mpaddr < d->arch.convmem_end && !d->is_dying) {
@@ -2797,7 +2795,7 @@ arch_memory_op(int op, XEN_GUEST_HANDLE(
}
/* This hypercall is used for VT-i domain only */
- if (!VMX_DOMAIN(d->vcpu[0])) {
+ if (!is_hvm_domain(d)) {
rcu_unlock_domain(d);
return -ENOSYS;
}
diff -r 99ed43004090 -r 2b050b0bc7a6
xen/include/asm-ia64/linux-xen/asm/pgtable.h
--- a/xen/include/asm-ia64/linux-xen/asm/pgtable.h Fri Mar 07 05:18:22
2008 +0100
+++ b/xen/include/asm-ia64/linux-xen/asm/pgtable.h Fri Mar 07 05:41:27
2008 +0100
@@ -108,7 +108,6 @@
#define GPFN_HIGH_MMIO (7UL << 60) /* High MMIO range */
#define GPFN_IO_MASK (7UL << 60) /* Guest pfn is I/O type */
-#define GPFN_INV_MASK (1UL << 63) /* Guest pfn is invalid */
#else
#define _PAGE_PROTNONE (__IA64_UL(1) << 63)
@@ -342,8 +341,7 @@ set_pte_rel(volatile pte_t* ptep, pte_t
#define pte_file(pte) ((pte_val(pte) & _PAGE_FILE) != 0)
#ifdef XEN
#define pte_pgc_allocated(pte) ((pte_val(pte) & _PAGE_PGC_ALLOCATED) != 0)
-#define pte_mem(pte) \
- (!(pte_val(pte) & (GPFN_IO_MASK | GPFN_INV_MASK)) && !pte_none(pte))
+#define pte_mem(pte) (!(pte_val(pte) & GPFN_IO_MASK) &&
!pte_none(pte))
#endif
/*
* Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit
in the
diff -r 99ed43004090 -r 2b050b0bc7a6 xen/include/asm-ia64/mm.h
--- a/xen/include/asm-ia64/mm.h Fri Mar 07 05:18:22 2008 +0100
+++ b/xen/include/asm-ia64/mm.h Fri Mar 07 05:41:27 2008 +0100
@@ -479,7 +479,7 @@ extern u64 translate_domain_pte(u64 ptev
gmfn_to_mfn_foreign((_d), (gpfn))
#define __gpfn_invalid(_d, gpfn) \
- (lookup_domain_mpa((_d), ((gpfn)<<PAGE_SHIFT), NULL) & GPFN_INV_MASK)
+ (lookup_domain_mpa((_d), ((gpfn)<<PAGE_SHIFT), NULL) == INVALID_MFN)
#define __gmfn_valid(_d, gpfn) !__gpfn_invalid(_d, gpfn)
@@ -488,8 +488,7 @@ extern u64 translate_domain_pte(u64 ptev
({ \
u64 pte, ret=0; \
pte = lookup_domain_mpa((_d), ((gpfn)<<PAGE_SHIFT), NULL); \
- if(!(pte&GPFN_INV_MASK)) \
- ret = pte & GPFN_IO_MASK; \
+ ret = (pte != INVALID_MFN) ? pte & GPFN_IO_MASK : 0; \
ret; \
})
@@ -497,8 +496,7 @@ extern u64 translate_domain_pte(u64 ptev
({ \
u64 pte, ret=0; \
pte = lookup_domain_mpa((_d), ((gpfn)<<PAGE_SHIFT), NULL); \
- if((!(pte&GPFN_INV_MASK))&&((pte & GPFN_IO_MASK)==GPFN_MEM)) \
- ret = 1; \
+ ret = (pte != INVALID_MFN) && (pte & GPFN_IO_MASK) == GPFN_MEM; \
ret; \
})
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