Module: xenomai-forge
Branch: master
Commit: a327c05a82b51cd34cbfafe5979df74356d7d47b
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=a327c05a82b51cd34cbfafe5979df74356d7d47b
Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date: Sun Mar 11 20:10:33 2012 +0100
arm: fix compilation with current ipipe-core
---
configure | 2 +-
include/asm-arm/bits/pod.h | 6 +++---
include/asm-arm/hal.h | 19 +++++++++++++------
kernel/cobalt/arch/arm/hal.c | 2 +-
kernel/cobalt/arch/arm/switch.S | 4 ++++
5 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/configure b/configure
index d620643..b193c2b 100755
--- a/configure
+++ b/configure
@@ -13581,7 +13581,7 @@ LD_FILE_OPTION=$ac_cv_ld_file_option
if test x$rtcore_type = xcobalt; then
- XENO_USER_CFLAGS="-I$srcdir/include/cobalt $XENO_USER_CFLAGS"
+ XENO_USER_CFLAGS="-I`cd $srcdir && pwd`/include/cobalt $XENO_USER_CFLAGS"
if [ $ac_cv_ld_file_option = yes ]; then
XENO_POSIX_WRAPPERS="-Wl,@`cd $srcdir && pwd`/lib/cobalt/posix.wrappers"
else
diff --git a/include/asm-arm/bits/pod.h b/include/asm-arm/bits/pod.h
index 7412586..9c62dd4 100644
--- a/include/asm-arm/bits/pod.h
+++ b/include/asm-arm/bits/pod.h
@@ -155,7 +155,7 @@ static inline void xnarch_enable_fpu(xnarchtcb_t *tcb)
systems for still unknown reasons.
*/
rthal_save_fpu(tcb->fpup, fpexc);
- last_VFP_context[ipipe_processor_id()] = NULL;
+ vfp_current_hw_state[ipipe_processor_id()] = NULL;
rthal_disable_fpu();
}
#else /* !CONFIG_VFP */
@@ -211,12 +211,12 @@ static inline void xnarch_restore_fpu(xnarchtcb_t * tcb)
the newly switched thread uses the FPU, to allow the kernel handler
to pick the correct FPU context.
- Further set last_VFP_context to NULL to avoid the Linux kernel to
+ Further set vfp_current_hw_state to NULL to avoid the Linux kernel to
save, when the fault occur, the current FPU context, the one of an RT
task, into the FPU area of the last non RT task which used the FPU
before the preemption by Xenomai.
*/
- last_VFP_context[ipipe_processor_id()] = NULL;
+ vfp_current_hw_state[ipipe_processor_id()] = NULL;
rthal_disable_fpu();
}
#else /* !CONFIG_VFP */
diff --git a/include/asm-arm/hal.h b/include/asm-arm/hal.h
index 29b24ad..f4fef47 100644
--- a/include/asm-arm/hal.h
+++ b/include/asm-arm/hal.h
@@ -152,7 +152,7 @@ static inline __attribute_const__ unsigned long
ffnz(unsigned long ul)
#define RTHAL_TIMER_IPI IPIPE_HRTIMER_IPI
#endif /* RTHAL_TIMER_IPI */
-#define RTHAL_TSC_INFO(p) ((p)->arch_tsc)
+#define RTHAL_TSC_INFO(p) ((p)->arch.tsc)
#define RTHAL_SHARED_HEAP_FLAGS (cache_is_vivt() ? XNHEAP_GFP_NONCACHED : 0)
@@ -219,7 +219,7 @@ static inline void rthal_init_fpu(rthal_fpenv_t *fpuenv)
#ifdef CONFIG_VFP
asmlinkage void rthal_vfp_save(union vfp_state *vfp, unsigned fpexc);
-asmlinkage void rthal_vfp_load(union vfp_state *vfp);
+asmlinkage void rthal_vfp_load(union vfp_state *vfp, unsigned cpu);
static inline void rthal_save_fpu(rthal_fpenv_t *fpuenv, unsigned fpexc)
{
@@ -228,7 +228,7 @@ static inline void rthal_save_fpu(rthal_fpenv_t *fpuenv,
unsigned fpexc)
static inline void rthal_restore_fpu(rthal_fpenv_t *fpuenv)
{
- rthal_vfp_load(&fpuenv->vfpstate);
+ rthal_vfp_load(&fpuenv->vfpstate, ipipe_processor_id());
}
#define rthal_vfp_fmrx(_vfp_) ({ \
@@ -244,10 +244,12 @@ static inline void rthal_restore_fpu(rthal_fpenv_t
*fpuenv)
", cr0, 0 @ fmxr " #_vfp_ ", %0": \
/* */ : "r" (_var_))
-extern union vfp_state *last_VFP_context[NR_CPUS];
+extern union vfp_state *vfp_current_hw_state[NR_CPUS];
+
static inline rthal_fpenv_t *rthal_get_fpu_owner(void)
{
union vfp_state *vfp_owner;
+ unsigned cpu;
#ifdef CONFIG_SMP
unsigned fpexc;
@@ -256,10 +258,16 @@ static inline rthal_fpenv_t *rthal_get_fpu_owner(void)
return NULL;
#endif
- vfp_owner = last_VFP_context[ipipe_processor_id()];
+ cpu = ipipe_processor_id();
+ vfp_owner = vfp_current_hw_state[cpu];
if (!vfp_owner)
return NULL;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) && defined(CONFIG_SMP)
+ if (vfp_owner->hard.cpu != cpu)
+ return NULL;
+#endif /* linux >= 3.2.0 */
+
return container_of(vfp_owner, rthal_fpenv_t, vfpstate);
}
@@ -324,4 +332,3 @@ static const char *const rthal_fault_labels[] = {
#endif /* !_XENO_ASM_ARM_HAL_H */
// vim: ts=4 et sw=4 sts=4
-indent-reg
diff --git a/kernel/cobalt/arch/arm/hal.c b/kernel/cobalt/arch/arm/hal.c
index 3b20f66..8ed802c 100644
--- a/kernel/cobalt/arch/arm/hal.c
+++ b/kernel/cobalt/arch/arm/hal.c
@@ -164,7 +164,7 @@ static void critical_sync(void)
}
}
#else /* CONFIG_SMP */
-#define rthal_critical_sync NULL
+#define critical_sync NULL
#endif /* !CONFIG_SMP */
static void rthal_timer_set_oneshot(int rt_mode)
diff --git a/kernel/cobalt/arch/arm/switch.S b/kernel/cobalt/arch/arm/switch.S
index b8bdf02..243ee7f 100644
--- a/kernel/cobalt/arch/arm/switch.S
+++ b/kernel/cobalt/arch/arm/switch.S
@@ -97,8 +97,12 @@ ENTRY(rthal_vfp_save)
/* Copied from no_old_VFP_process in arch/arm/vfp/vfphw.S
* r0 = pointer to union vfp_state
+ * r1 = current cpu
*/
ENTRY(rthal_vfp_load)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) && defined(CONFIG_SMP)
+ str r1, [r0, #VFP_CPU]
+#endif
VFPFLDMIA r0, r2 @ reload the working registers while
@ FPEXC is in a safe state
ldmia r0, {r1, r2, r3, r12} @ load FPEXC, FPSCR, FPINST, FPINST2
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