Module: xenomai-3
Branch: next
Commit: 52152b635c0ee5edaabccc7356b8c8c95fca1e72
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=52152b635c0ee5edaabccc7356b8c8c95fca1e72
Author: Philippe Gerum <r...@xenomai.org>
Date: Mon Oct 19 15:54:55 2015 +0200
cobalt/arm64: switch to regular system call convention
---
.../arch/arm64/include/asm/xenomai/syscall.h | 29 +---
.../arch/arm64/include/asm/xenomai/uapi/syscall.h | 8 +-
lib/cobalt/arch/arm64/features.c | 8 -
.../arch/arm64/include/asm/xenomai/syscall.h | 180 ++++++++------------
lib/cobalt/arch/arm64/include/asm/xenomai/tsc.h | 19 +--
5 files changed, 78 insertions(+), 166 deletions(-)
diff --git a/kernel/cobalt/arch/arm64/include/asm/xenomai/syscall.h
b/kernel/cobalt/arch/arm64/include/asm/xenomai/syscall.h
index 949f287..9fc6522 100644
--- a/kernel/cobalt/arch/arm64/include/asm/xenomai/syscall.h
+++ b/kernel/cobalt/arch/arm64/include/asm/xenomai/syscall.h
@@ -28,31 +28,16 @@
#include <asm/ptrace.h>
#include <asm-generic/xenomai/syscall.h>
-#ifndef __NR_SYSCALL_BASE
-#define __NR_SYSCALL_BASE 0
-#endif
-
-#ifndef __ARM_NR_ipipe
-/* Legacy pipelines do not define this. */
-#define __ARM_NR_ipipe (__NR_SYSCALL_BASE + XENO_ARM_SYSCALL)
-#endif
-
-#define __xn_reg_sys(__regs) ((__regs)->orig_x0)
-/* In OABI_COMPAT mode, handle both OABI and EABI userspace syscalls */
-#ifdef CONFIG_OABI_COMPAT
-#define __xn_syscall_p(__regs) (((__regs)->regs[8] == __NR_OABI_SYSCALL_BASE +
XENO_ARM_SYSCALL) || \
- ((__regs)->regs[8] == __ARM_NR_ipipe))
-#else /* !CONFIG_OABI_COMPAT */
-#define __xn_syscall_p(__regs) ((__regs)->regs[8] == __ARM_NR_ipipe)
-#endif /* !CONFIG_OABI_COMPAT */
+#define __xn_reg_sys(__regs) ((unsigned long)(__regs)->syscallno)
+#define __xn_syscall_p(regs) ((__xn_reg_sys(regs) & __COBALT_SYSCALL_BIT) !=
0)
#define __xn_syscall(__regs) ((unsigned long)(__xn_reg_sys(__regs) &
~__COBALT_SYSCALL_BIT))
#define __xn_reg_rval(__regs) ((__regs)->regs[0])
-#define __xn_reg_arg1(__regs) ((__regs)->regs[1])
-#define __xn_reg_arg2(__regs) ((__regs)->regs[2])
-#define __xn_reg_arg3(__regs) ((__regs)->regs[3])
-#define __xn_reg_arg4(__regs) ((__regs)->regs[4])
-#define __xn_reg_arg5(__regs) ((__regs)->regs[5])
+#define __xn_reg_arg1(__regs) ((__regs)->regs[0])
+#define __xn_reg_arg2(__regs) ((__regs)->regs[1])
+#define __xn_reg_arg3(__regs) ((__regs)->regs[2])
+#define __xn_reg_arg4(__regs) ((__regs)->regs[3])
+#define __xn_reg_arg5(__regs) ((__regs)->regs[4])
#define __xn_reg_pc(__regs) ((__regs)->pc)
#define __xn_reg_sp(__regs) ((__regs)->sp)
diff --git a/kernel/cobalt/arch/arm64/include/asm/xenomai/uapi/syscall.h
b/kernel/cobalt/arch/arm64/include/asm/xenomai/uapi/syscall.h
index 60dabd5..5b319d6 100644
--- a/kernel/cobalt/arch/arm64/include/asm/xenomai/uapi/syscall.h
+++ b/kernel/cobalt/arch/arm64/include/asm/xenomai/uapi/syscall.h
@@ -23,12 +23,6 @@
#define __xn_syscode(__nr) (__COBALT_SYSCALL_BIT | (__nr))
-#define XENO_ARM_SYSCALL 0x000F0042 /* carefully chosen... */
-
-#define XENOMAI_SYSARCH_ATOMIC_ADD_RETURN 0
-#define XENOMAI_SYSARCH_ATOMIC_SET_MASK 1
-#define XENOMAI_SYSARCH_ATOMIC_CLEAR_MASK 2
-#define XENOMAI_SYSARCH_XCHG 3
-#define XENOMAI_SYSARCH_TSCINFO 4
+#define XENOMAI_SYSARCH_TSCINFO 0
#endif /* !_COBALT_ARM64_ASM_UAPI_SYSCALL_H */
diff --git a/lib/cobalt/arch/arm64/features.c b/lib/cobalt/arch/arm64/features.c
index f5253a6..254c8ae 100644
--- a/lib/cobalt/arch/arm64/features.c
+++ b/lib/cobalt/arch/arm64/features.c
@@ -59,14 +59,6 @@ void cobalt_check_features(struct cobalt_featinfo *finfo)
page_size = sysconf(_SC_PAGESIZE);
-#ifndef __aarch64__
- __xn_tscinfo.kuser_tsc_get =
- (__xn_rdtsc_t *)(0xffff1004 -
- ((*(unsigned *)(0xffff0ffc) + 3) << 5));
-#else
- __xn_tscinfo.kuser_tsc_get = 0;
-#endif
-
phys_addr = (unsigned long)__xn_tscinfo.kinfo.counter;
addr = __STD(mmap(NULL, page_size, PROT_READ, MAP_SHARED,
diff --git a/lib/cobalt/arch/arm64/include/asm/xenomai/syscall.h
b/lib/cobalt/arch/arm64/include/asm/xenomai/syscall.h
index 8e7ad61..d2dfda6 100644
--- a/lib/cobalt/arch/arm64/include/asm/xenomai/syscall.h
+++ b/lib/cobalt/arch/arm64/include/asm/xenomai/syscall.h
@@ -1,8 +1,5 @@
/*
- * Copyright (C) 2001,2002,2003,2004 Philippe Gerum <r...@xenomai.org>.
- *
- * ARM port
- * Copyright (C) 2005 Stelian Pop
+ * Copyright (C) 2015 Philippe Gerum <r...@xenomai.org>.
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
@@ -25,119 +22,76 @@
#include <errno.h>
#include <cobalt/uapi/syscall.h>
-/*
- * Some of the following macros have been adapted from Linux's
- * implementation of the syscall mechanism in <asm-arm/unistd.h>:
- */
-
-#define LOADARGS_0(syscode, dummy...) \
- __a0 = (unsigned long) (syscode)
-#define LOADARGS_1(syscode, arg1) \
- LOADARGS_0(syscode); \
- __a1 = (unsigned long) (arg1)
-#define LOADARGS_2(syscode, arg1, arg2) \
- LOADARGS_1(syscode, arg1); \
- __a2 = (unsigned long) (arg2)
-#define LOADARGS_3(syscode, arg1, arg2, arg3) \
- LOADARGS_2(syscode, arg1, arg2); \
- __a3 = (unsigned long) (arg3)
-#define LOADARGS_4(syscode, arg1, arg2, arg3, arg4) \
- LOADARGS_3(syscode, arg1, arg2, arg3); \
- __a4 = (unsigned long) (arg4)
-#define LOADARGS_5(syscode, arg1, arg2, arg3, arg4, arg5) \
- LOADARGS_4(syscode, arg1, arg2, arg3, arg4); \
- __a5 = (unsigned long) (arg5)
-
-#define CLOBBER_REGS_0 "r0"
-#define CLOBBER_REGS_1 CLOBBER_REGS_0, "r1"
-#define CLOBBER_REGS_2 CLOBBER_REGS_1, "r2"
-#define CLOBBER_REGS_3 CLOBBER_REGS_2, "r3"
-#define CLOBBER_REGS_4 CLOBBER_REGS_3, "r4"
-#define CLOBBER_REGS_5 CLOBBER_REGS_4, "r5"
-
-#define LOADREGS_0 __r0 = __a0
-#define LOADREGS_1 LOADREGS_0; __r1 = __a1
-#define LOADREGS_2 LOADREGS_1; __r2 = __a2
-#define LOADREGS_3 LOADREGS_2; __r3 = __a3
-#define LOADREGS_4 LOADREGS_3; __r4 = __a4
-#define LOADREGS_5 LOADREGS_4; __r5 = __a5
-
-#define ASM_INDECL_0 \
- unsigned long __a0; register unsigned long __r0 __asm__ ("r0");
-#define ASM_INDECL_1 ASM_INDECL_0; \
- unsigned long __a1; register unsigned long __r1 __asm__ ("r1")
-#define ASM_INDECL_2 ASM_INDECL_1; \
- unsigned long __a2; register unsigned long __r2 __asm__ ("r2")
-#define ASM_INDECL_3 ASM_INDECL_2; \
- unsigned long __a3; register unsigned long __r3 __asm__ ("r3")
-#define ASM_INDECL_4 ASM_INDECL_3; \
- unsigned long __a4; register unsigned long __r4 __asm__ ("r4")
-#define ASM_INDECL_5 ASM_INDECL_4; \
- unsigned long __a5; register unsigned long __r5 __asm__ ("r5")
-
-#define ASM_INPUT_0 "0" (__r0)
-#define ASM_INPUT_1 ASM_INPUT_0, "r" (__r1)
-#define ASM_INPUT_2 ASM_INPUT_1, "r" (__r2)
-#define ASM_INPUT_3 ASM_INPUT_2, "r" (__r3)
-#define ASM_INPUT_4 ASM_INPUT_3, "r" (__r4)
-#define ASM_INPUT_5 ASM_INPUT_4, "r" (__r5)
+#define __emit_asmdecl0
\
+ register unsigned int __scno __asm__ ("w8"); \
+ register unsigned long __res __asm__ ("x0")
+#define __emit_asmdecl1
\
+ __emit_asmdecl0; register unsigned long __x0 __asm__ ("x0")
+#define __emit_asmdecl2
\
+ __emit_asmdecl1; register unsigned long __x1 __asm__ ("x1")
+#define __emit_asmdecl3
\
+ __emit_asmdecl2; register unsigned long __x2 __asm__ ("x2")
+#define __emit_asmdecl4
\
+ __emit_asmdecl3; register unsigned long __x3 __asm__ ("x3")
+#define __emit_asmdecl5
\
+ __emit_asmdecl4; register unsigned long __x4 __asm__ ("x4")
-#define __sys2(x) #x
-#define __sys1(x) __sys2(x)
+#define __load_asminput0(__op) \
+ __scno = (unsigned int)__xn_syscode(__op)
+#define __load_asminput1(__op, __a1) \
+ __load_asminput0(__op); \
+ __x0 = (unsigned long)(__a1)
+#define __load_asminput2(__op, __a1, __a2) \
+ __load_asminput1(__op, __a1); \
+ __x1 = (unsigned long)(__a2)
+#define __load_asminput3(__op, __a1, __a2, __a3) \
+ __load_asminput2(__op, __a1, __a2); \
+ __x2 = (unsigned long)(__a3)
+#define __load_asminput4(__op, __a1, __a2, __a3, __a4) \
+ __load_asminput3(__op, __a1, __a2, __a3); \
+ __x3 = (unsigned long)(__a4)
+#define __load_asminput5(__op, __a1, __a2, __a3, __a4, __a5) \
+ __load_asminput4(__op, __a1, __a2, __a3, __a4); \
+ __x4 = (unsigned long)(__a5)
-#ifndef __aarch64__
-#ifdef __ARM_EABI__
-#define __SYS_REG , "r7"
-#define __SYS_REG_DECL register unsigned long __r7 __asm__ ("r7")
-#define __SYS_REG_SET __r7 = XENO_ARM_SYSCALL
-#define __SYS_REG_INPUT ,"r" (__r7)
-#define __SYS_CALLOP "swi\t0"
-#else
-#define __SYS_REG
-#define __SYS_REG_DECL
-#define __SYS_REG_SET
-#define __SYS_REG_INPUT
-#define __NR_OABI_SYSCALL_BASE 0x900000
-#define __SYS_CALLOP "swi\t" __sys1(__NR_OABI_SYSCALL_BASE + XENO_ARM_SYSCALL)
""
-#endif
-#else
-#define __SYS_REG , "r8"
-#define __SYS_REG_DECL register unsigned long __r8 __asm__ ("r8")
-#define __SYS_REG_SET __r8 = XENO_ARM_SYSCALL
-#define __SYS_REG_INPUT ,"r" (__r8)
-#define __SYS_CALLOP "svc\t0"
-#endif
+#define __emit_syscall0(__args...) \
+ __asm__ __volatile__ ( \
+ "svc 0;\n\t" \
+ : "=r" (__res) \
+ : "r" (__scno), ##__args \
+ : "cc", "memory"); \
+ __res
+#define __emit_syscall1(__a1, __args...) \
+ __emit_syscall0("r" (__x0), ##__args)
+#define __emit_syscall2(__a1, __a2, __args...) \
+ __emit_syscall1(__a1, "r" (__x1), ##__args)
+#define __emit_syscall3(__a1, __a2, __a3, __args...) \
+ __emit_syscall2(__a1, __a2, "r" (__x2), ##__args)
+#define __emit_syscall4(__a1, __a2, __a3, __a4, __args...) \
+ __emit_syscall3(__a1, __a2, __a3, "r" (__x3), ##__args)
+#define __emit_syscall5(__a1, __a2, __a3, __a4, __a5, __args...) \
+ __emit_syscall4(__a1, __a2, __a3, __a4, "r" (__x4), ##__args)
-#define XENOMAI_DO_SYSCALL(nr, op, args...) \
- ({ \
- ASM_INDECL_##nr; \
- __SYS_REG_DECL; \
- LOADARGS_##nr(__xn_syscode(op), args); \
- __asm__ __volatile__ ("" : /* */ : /* */ : \
- CLOBBER_REGS_##nr __SYS_REG); \
- LOADREGS_##nr; \
- __SYS_REG_SET; \
- __asm__ __volatile__ ( \
- __SYS_CALLOP \
- : "=r" (__r0) \
- : ASM_INPUT_##nr __SYS_REG_INPUT \
- : "memory"); \
- (int) __r0; \
+#define XENOMAI_DO_SYSCALL(__argnr, __op, __args...) \
+ ({ \
+ __emit_asmdecl##__argnr; \
+ __load_asminput##__argnr(__op, ##__args); \
+ __emit_syscall##__argnr(__args); \
})
-#define XENOMAI_SYSCALL0(op) \
- XENOMAI_DO_SYSCALL(0,op)
-#define XENOMAI_SYSCALL1(op,a1) \
- XENOMAI_DO_SYSCALL(1,op,a1)
-#define XENOMAI_SYSCALL2(op,a1,a2) \
- XENOMAI_DO_SYSCALL(2,op,a1,a2)
-#define XENOMAI_SYSCALL3(op,a1,a2,a3) \
- XENOMAI_DO_SYSCALL(3,op,a1,a2,a3)
-#define XENOMAI_SYSCALL4(op,a1,a2,a3,a4) \
- XENOMAI_DO_SYSCALL(4,op,a1,a2,a3,a4)
-#define XENOMAI_SYSCALL5(op,a1,a2,a3,a4,a5) \
- XENOMAI_DO_SYSCALL(5,op,a1,a2,a3,a4,a5)
-#define XENOMAI_SYSBIND(breq) \
- XENOMAI_DO_SYSCALL(1,sc_cobalt_bind,breq)
+#define XENOMAI_SYSCALL0(__op) \
+ XENOMAI_DO_SYSCALL(0, __op)
+#define XENOMAI_SYSCALL1(__op, __a1) \
+ XENOMAI_DO_SYSCALL(1, __op, __a1)
+#define XENOMAI_SYSCALL2(__op, __a1, __a2) \
+ XENOMAI_DO_SYSCALL(2, __op, __a1, __a2)
+#define XENOMAI_SYSCALL3(__op, __a1, __a2, __a3) \
+ XENOMAI_DO_SYSCALL(3, __op, __a1, __a2, __a3)
+#define XENOMAI_SYSCALL4(__op, __a1, __a2, __a3, __a4) \
+ XENOMAI_DO_SYSCALL(4, __op, __a1, __a2, __a3, __a4)
+#define XENOMAI_SYSCALL5(__op, __a1, __a2, __a3, __a4, __a5) \
+ XENOMAI_DO_SYSCALL(5, __op, __a1, __a2, __a3, __a4, __a5)
+#define XENOMAI_SYSBIND(__breq) \
+ XENOMAI_DO_SYSCALL(1, sc_cobalt_bind, __breq)
#endif /* !_LIB_COBALT_ARM64_SYSCALL_H */
diff --git a/lib/cobalt/arch/arm64/include/asm/xenomai/tsc.h
b/lib/cobalt/arch/arm64/include/asm/xenomai/tsc.h
index a055427..b145403 100644
--- a/lib/cobalt/arch/arm64/include/asm/xenomai/tsc.h
+++ b/lib/cobalt/arch/arm64/include/asm/xenomai/tsc.h
@@ -22,21 +22,16 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
*/
-#ifndef _LIB_COBALT_ARM_TSC_H
-#define _LIB_COBALT_ARM_TSC_H
+#ifndef _LIB_COBALT_ARM64_TSC_H
+#define _LIB_COBALT_ARM64_TSC_H
#include <asm/xenomai/uapi/tsc.h>
#include <asm/xenomai/features.h>
#include <inttypes.h>
#include <sys/time.h>
-/*
- * Putting kuser_tsc_get and kinfo.counter in the same struct results
- * in less operations in PIC code, thus optimizes.
- */
typedef unsigned long long __xn_rdtsc_t(volatile unsigned *vaddr);
struct __xn_full_tscinfo {
- __xn_rdtsc_t *kuser_tsc_get;
struct __xn_tscinfo kinfo;
};
extern struct __xn_full_tscinfo __xn_tscinfo;
@@ -45,11 +40,7 @@ static inline uint64_t get_counter(void)
{
uint64_t cval;
-#ifdef __aarch64__
asm volatile("isb; mrs %0, cntvct_el0; isb; " : "=r" (cval) ::
"memory");
-#else
- asm volatile("isb; mrrc p15, 1, %Q0, %R0, c14; isb" : "=r" (cval) ::
"memory");
-#endif
return cval;
}
@@ -57,11 +48,7 @@ static inline uint64_t get_counter(void)
static inline __attribute__((always_inline))
unsigned long long cobalt_read_tsc(void)
{
-#ifndef __aarch64__
- return __xn_tscinfo.kuser_tsc_get(__xn_tscinfo.kinfo.counter);
-#else
return get_counter();
-#endif
}
-#endif /* !_LIB_COBALT_ARM_TSC_H */
+#endif /* !_LIB_COBALT_ARM64_TSC_H */
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