stephane ancelot wrote:
> Hi,
> Finally since I did not understand why this happened and to inhibit any
> driver writing related problems,I made the following architecture :
>
> a single 5ms task triggs a PLX 9050 INTCSR software register to activate
> INTA (level irq)
>
> the rtdm interupt handler checks if IT comes from the PLX, disable PLX IT,
> resets the software register , reenable PLX it,
> and ack irq rtdm
>
> However at random time , I have always spurious interrupt in this handler.
> The time it occurs is random .
>
> attached my kernel config.gz
Hi,
Did you check the differences in masking/acking/unmasking interrupts for
the interrupt controller you use between the I-pipe patch that works and
the I-pipe patch that does not work ?
Regards.
--
Gilles.
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