On Thu, Apr 16, 2015 at 10:39:59PM +0800, Zhoupeng wrote:
> >> This is just MMIO write to 82583, of course MMIO is uncache.
> >> And PCIE ASPM is disabled, so L0s is not the problem.
> >>
> >> I think PCIE Memory Write TLPs is fast enough, but why spend so much
> time?
>
> >There is an interesting article that may be relevant to this issue
> >
> >"PCI Express as a Killer of Software-based Real-Time Ethernet"
>
> I have read the article carefully.
> The author don't mention PCIE ASPM, Latency will be better by disable it.
>
> Every rt_dev_sendmsg will trigger one writel(tx_ring->tail) in Rtnet.
> As the "writel" is time expensive, improvement may be done to Rtnet:
> using rtskb to buffer multiple packets, and using one IOCTL to trigger
> "writel".
Patches welcome.
--
Gilles.
_______________________________________________
Xenomai mailing list
[email protected]
http://www.xenomai.org/mailman/listinfo/xenomai
