Hi Moein, Thanks for you interest in XiangShan. Sorry for now we don't have
detailed documention for all repos under OpenXiangShan. These .bin files are
raw binary files produced by objcopy. Files passed with -i to emu are placed in
physical memory, which starts with 0x80000000. As such, the bin file should be
raw binary of the instructions and heap data of an elf executable. For more
information, we have a bare-metal environment called abstract machine
(OpenXiangShan/nexus-am) that contains some simple stdio functions. Refer to
apps/coremark or tests/cputest to see how we work on am. Use make
ARCH=riscv64-xs to compile coremark. I think your executable is able to run
after a bin file is generated with objcopy, if the entry point for elf is
located at 0x80000000. We have a riscv proxy kernel repo in
OpenXiangShan/riscv-pk. Please have a look the Makefile in riscv-pk to see how
we generates bbl.bin from the bbl elf executable. Look like there's only one
more objcopy step before your executable can be running on XiangShan. Best,
Yinan On 08/20/2021 02:59, Moein Ghaniyoun wrote: Hello XiangShan community,
First, I would like to thank you all for all the efforts on building this open
source RISC-V processor! I had a question regarding the workload generation to
pass the image file to the ‘emu’ Verilator executable. As far as I know, there
is already a directory named ‘ready-to-run’ consisting of 3 different .bin
files which can be passed to ‘emu’ executable. I am wondering on how I can
generate a custom workload and pass it to the simulator? I have already
compiled my code using riscv64-unknown-elf-gcc and generated the ELF file but
it seems like it cannot be passed “as is” to the ‘emu’ as the simulator gets
stuck only after executing three instructions. For the reference, the exact ELF
file works perfectly on BOOM core. I am not quite sure on what I am missing
here regarding the formatting and stuff and it would be great if you could
guide me on this. Thanks, Moein
