Hi all, Please pardon the rather lengthy question.
I've got a question on how to properly handle a case where the device memory endian-ness is different from the CPU endianness. A little bit of back-ground: The CPU being arm-based is little-endian. The Display peripheral is: 1. In big-endian format. 2. Configured to operate in 4bpp grayscale mode. The pixel order (according to cpu on a 32 bit word boundary) is: p0p1p2p3p4p5p6p7 -> MSByte: p6p7 p4p5 p2p3 LSByte: p1p0 To handle this setup, I have made the following mods to X and pixman: 1.Modified IMAGE_BYTE_ORDER and BITMAP_BIT_ORDER in servermd.h to MSByte 2. Added a format in pixman This works in most cases, but the memcpy fbBlt causes issues where the dst (when writing to the FB) and src (when reading from the FB) are not word aligned. I've highlighted the 4 alignment cases of writes to the FB: LEGEND: [nm]: pixel numbers src(alignment): src buffer and its alignment - image to be copied dst-n(alignment): dst address with a -n offset to aligning it to word boundary and contents after memcpy(src, dst, 8) disp: How the pixels are displayed on the screen OFFSET 1 -------- what we have: | | src(0): [67][45][23][01][ef][cd][ab][89] | | | dst-1(0): [..][67][45][23][01][ef][cd][ab][89][..][..][..] disp: [23][45][67][..][ab][cd][ef][01][..][..][..][89] what we want: disp: [..][01][23][45][67][89][ab][cd][ef][..][..][..] dst-1(0) [45][23][01][..][cd][ab][89][67][..][..][..][ef] src(0): [67][45][23][01][ef][cd][ab][89] OFFSET 2 -------- what we have: | | src(0): [67][45][23][01][ef][cd][ab][89] | | | dst-2(0): [..][..][67][45][23][01][ef][cd][ab][89][..][..] disp: [45][67][..][..][cd][ef][01][23][..][..][89][ab] what we want: disp: [..][..][01][23][45][67][89][ab][cd][ef][..][..] dst-2(0) [23][01][..][..][ab][89][67][45][..][..][ef][cd] src(0): [67][45][23][01][ef][cd][ab][89] OFFSET 3 -------- what we have: | | src(0): [67][45][23][01][ef][cd][ab][89] | | | dst-3(0): [..][..][..][67][45][23][01][ef][cd][ab][89][..] disp: [67][..][..][..][ef][01][23][45][..][89][ab][cd] what we want: disp: [..][..][..][01][23][45][67][89][ab][cd][ef][..] dst-3(0) [01][..][..][..][89][67][45][23][..][ef][cd][ab] src(0): [67][45][23][01][ef][cd][ab][89] I've tested this out by writing my own memcpy that writes the bytes in the expected order. But unfortunately this works when writing to the screen. When reading from the screen (I think scrolling does this), the data is all garbled because the memcpy is not symmetrical. What is the best way to handle this particular configuration? I've come across references to shadow frame buffers. Is that the right approach to it? Thanks in advance, D
_______________________________________________ xorg-devel@lists.x.org: X.Org development Archives: http://lists.x.org/archives/xorg-devel Info: http://lists.x.org/mailman/listinfo/xorg-devel