On Mon, Apr 11, 2016 at 3:39 AM, Michel Dänzer <mic...@daenzer.net> wrote:
> From: Qiang Yu <qiang...@amd.com>
>
> Signed-off-by: Qiang Yu <qiang...@amd.com>
> (Ported from amdgpu commit a0bbb373f902e0ffc14570c85faec7e44134f62e)
>
> Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> src/radeon_kms.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/src/radeon_kms.c b/src/radeon_kms.c
> index c5310ea..c35c951 100644
> --- a/src/radeon_kms.c
> +++ b/src/radeon_kms.c
> @@ -1108,8 +1108,11 @@ static void RADEONSetupCapabilities(ScrnInfoPtr pScrn)
> if (ret == 0) {
> if (value & DRM_PRIME_CAP_EXPORT)
> pScrn->capabilities |= RR_Capability_SourceOutput |
> RR_Capability_SinkOffload;
> - if (value & DRM_PRIME_CAP_IMPORT)
> - pScrn->capabilities |= RR_Capability_SinkOutput |
> RR_Capability_SourceOffload;
> + if (value & DRM_PRIME_CAP_IMPORT) {
> + pScrn->capabilities |= RR_Capability_SourceOffload;
> + if (info->drmmode.count_crtcs)
> + pScrn->capabilities |= RR_Capability_SinkOutput;
> + }
> }
> #endif
> }
> @@ -1228,8 +1231,6 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
>
> info->allowColorTiling2D = FALSE;
>
> - RADEONSetupCapabilities(pScrn);
> -
> /* don't enable tiling if accel is not enabled */
> if (!info->r600_shadow_fb) {
> Bool colorTilingDefault =
> @@ -1328,6 +1329,8 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
> goto fail;
> }
>
> + RADEONSetupCapabilities(pScrn);
> +
> if (info->drmmode.count_crtcs == 1)
> pRADEONEnt->HasCRTC2 = FALSE;
> else
> --
> 2.8.0.rc3
>
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