On Thu, Feb 4, 2010 at 2:57 PM, <ri...@happyleptic.org> wrote: > In compiler.h, is defined mem_barrier() which is used if I understand > correctly when accessing the memory mapped IO, to force the CPU to > ensure previous writes/reads are commited to the bus before the > following ones (gcc being independantly informed to keep the source code > reads/writes ordering by the use of volatile). > > On MIPS on Linux, I see that the mem_barrier consist of several nops. > > I do not understand these nops, since first MIPS ISA there exist > a SYNC instruction that forces the CPU to flush reads/writes for this > very purpose. > > Also, this instruction is certainly faster, and more portable than a > sequence of nops. > > But I'm certain that the original author knew more about MIPS than I do, > that's why I'm asking here for a clue.
You must be looking at old source code. I changed this code in commit 52aa0495218d to use the sync instruction you mention. It was committed August 31 2009, so X server 1.7 and newer releases should have this code. Matt Turner _______________________________________________ xorg mailing list xorg@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/xorg