Michel Dänzer <[EMAIL PROTECTED]> writes: > On Son, 2002-11-03 at 17:03, Aymeric Vincent wrote: > > > > Actually, I would like to understand how the r128 chip reads the video > > memory and sends it to the CRTC, because when I use 15/16 or 24 bit > > modes, the display on the CRT monitor (through CRTC2) is split > > horizontally in two/two or four respectively, and the same half or > > quarter left-hand side of the screen is repeated on the right. The > > Flat Panel driven by the first CRTC is OK. Does such a behaviour ring > > a bell? > > The columns are okay?
Yes. I get two or four copies of the first stripe. Although some vertical lines in the first copy are shifted by one pixel to the bottom. But the displayed image is stable. > > [ My interpretation is that the CRTCs have a small buffer that can > > contain a certain amount of pixels (obviously depending on the number > > of bytes per pixel), and if for whatever reason the video memory can't > > keep up, they will redisplay what is available in their buffer until > > the next line. ] > > That's not my understanding, for what that's worth. (Why would the video RAM > not be able to keep up, anyway? Keep up with what?) The colors are okay, > i.e. it's not displaying 8 bit data in another depth? Everything is okay from this point of view. I was thinking that enabling the second CRTC could imply using twice the bandwidth, since both CRTC could be displaying different parts of the video RAM. > > If I understand correctly, you have access to the ATI documentation, > > and although I may be wrong, it looks from experimental values I get, > > that in xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h, the > > offsets of R128_FP_CRTC_H_TOTAL_DISP and R128_FP_CRTC_V_TOTAL_DISP are > > shifted by 4 bytes, from 0x0254/0x0258 to 0x0250/0x0254. I suspect the > > same shift occurs for the radeon. Could you please confirm this? > > Depends how you think they're shifted. ;) For the Radeon, the docs I > have say 0x250/0x254; the Rage128 docs I have don't cover these > registers, but I guess they may well be the same. To be precise, in order to get sensible values from the registers (as set up by the OpenFirmWare of my iBook), I need the following patch: --- r128_reg.h 2002/09/04 15:10:14 1.1.1.5 +++ r128_reg.h 2002/10/14 09:05:21 @@ -554,8 +559,8 @@ #define R128_FOG_3D_TABLE_DENSITY 0x181c #define R128_FOG_TABLE_INDEX 0x1a14 #define R128_FOG_TABLE_DATA 0x1a18 -#define R128_FP_CRTC_H_TOTAL_DISP 0x0250 -#define R128_FP_CRTC_V_TOTAL_DISP 0x0254 +#define R128_FP_CRTC_H_TOTAL_DISP 0x0254 +#define R128_FP_CRTC_V_TOTAL_DISP 0x0258 #define R128_FP_GEN_CNTL 0x0284 # define R128_FP_FPON (1 << 0) # define R128_FP_BLANK_DIS (1 << 1) Aymeric _______________________________________________ Xpert mailing list [EMAIL PROTECTED] http://XFree86.Org/mailman/listinfo/xpert
