J?rgen Keil wrote: >Aren't system libraries required not to touch application global registers %g2 >- %g4? > >
Yeah, the good old ABI. x86 readers may need a quick refresh first, especially considering the v8 versus v8plus <---> versus v9 ABI differences: http://developers.sun.com/solaris/articles/sparcv9abi.html http://docs.sun.com/app/docs/doc/816-5138/6mba6ua5p?a=view >When I look at the disassembly of _XInternAtom in /usr/lib/libX11.so.4 >(from Solaris Nevada snv_48 SPARC), I see that the code is using / thrashing >global register %g2. > >I see code like this: > > _XInternAtom+0x264: 94 10 00 11 mov %l1, %o2 > _XInternAtom+0x268: ac 0d e0 03 and %l7, 0x3, %l6 > _XInternAtom+0x26c: 84 0a 60 03 and %o1, 0x3, %g2 > _XInternAtom+0x270: 80 95 80 02 orcc %l6, %g2, %g0 > > >Or this: > > _XInternAtom+0x2bc: c4 0d bf ff ldub [%l6 - 0x1], %g2 > _XInternAtom+0x2c0: 16 bf ff f9 bge -0x1c > <_XInternAtom+0x2a4> > _XInternAtom+0x2c4: c4 2d ff ff stb %g2, [%l7 - 0x1] > > >This breaks applications like qemu, which is trying to use global registers >%g2 - %g4; >but some of these global register variables get thrashed by calls into the X11 >libraries. > >Shouldn't the Solaris X11 shared libraries be compiled with -xregs=no%appl ? > > Aren't they already, at least in terms of Xorg 7.2 ?? --->> # grep -n "xregs=no%appl" /mnt/6/Xorg720_alanc/X-src-20070227/XW_NV/open-src/common/Makefile.inc__ORIG 76:DEFAULT_sun4_ARCH_LIB_FLAGS = -xregs=no%appl # >See also Bug ID 4166599 >http://bugs.opensolaris.org/bugdatabase/view_bug.do?bug_id=4166599 > > > However, in order to get Xorg running and rocking on sparc (letting qemu alone for now), I have a completely different set of _real_ problems! I permanently get kernel panics (with Xorg built for v8plus), have quite a number of funny address alignment issues in the bus scanning code for the misc. bridges (i.e. Schizo, Schizo+, Psycho, Simba etc.), especially on v9 or v9a (-xmemalign=4i shows best results, but not all PCI_bus's cards are identified with it ... ), then, worse: The pci bus subsystems are standardized (though there are still a few differences among vendors, i.e. how pci errors are treated, traps etc.). However, the pci2.2 spec does not cover the underlying bridges, unfortunately! Due to a lack of SUNW-internal specs and documentation my last chance was, to browse linux and bsd* kernel sources and relevant parts of Xorg code. My Xorg7.2 patch due on March31st will enable/cover _both_ build32(v8plus) and build64(v9) builds, because the pci and sbus/upa bus scanning code needs substantial further porting for it to work half as good for v9, when compared to how well it already does on / for v8 or v8plus.
