Derick, I'm not sure how either of your references addresses the original comment that the Cell SPEs are not SMP cores, but rather co-processors.
Looking at IBM's developer references: http://www-306.ibm.com/chips/techlib/techlib.nsf/products/Cell_Broadband_Eng ine there are several papers addressing the Cell architecture. One (2053_IBM_CellIntro.pdf) presents a good overview of the Cell. In it it refers to several programming models for the SPEs: device extension model, function offload model, and streaming programming model. The SPEs are *clearly* co-processors tightly coupled with a modified PPC 970. The power in the cell is that it provides the hardware for very efficient parallel signal processing, not that it is a 9-way SMP machine (1 PPC + 8 SPEs). Regards, Henry Derick Centeno writes: > Henry, > > I believe you misread the Wikipedia reference. > > Perhaps that is not the case, it is also possible that between the time > you referenced it and I did, additions were made which were not there > before. > Let's be clear that as convenient as Wikipedia is; it is not reliable as > a consistent reference. The author of the article for Wikipedia > complains that he didn't use all his references as Wikipedia's system is > doesn't meet professional standards. <blah blah blah> > The link however, which I provided earlier published by High > Productivity Computing is from very reputable sources and no one there > is engaged in hiding or slanting the facts. Here is that link again: > > http://www.hpcwire.com/hpc/967146.html > > Another different analysis from a reputable publication Ars Technica is > here: > > http://arstechnica.com/articles/columns/linux/linux-20061018.ars > > > _______________________________________________ yellowdog-general mailing list [email protected] http://lists.terrasoftsolutions.com/mailman/listinfo/yellowdog-general HINT: to Google archives, try '<keywords> site:terrasoftsolutions.com'
