*From:* Erik Trimble <[email protected]

GPUs sitting on the PCI-E bus are going to have this problem, and it's
likely insurmountable.

In what context, ZFS or MD5 checksums?

Over a year ago I did an experiment extracting
what I believe was the 256-bit RAID-Z checksum
calculation into a standalone user space program.
Compared to a i7-920, a Quadro FX 4800 was much
faster and this included the Gen2 x16 transport.
Of course, the trick is to overlap the transport
with compute so that data is always in flight.


HOWEVER, AMD *is* finally getting around to implementing a GPU in the
same package as the CPU, so we'll shortly be able to see a combined
CPU/GPU thing that sits in an AM3 socket (or, more likely, a C32
socket). There's even a possibility that AMD's talked about where an
advanced GPU will live in a second CPU-style socket, with direct HT
connections. This sort of design at least leads itself to being used
as a co-processor, as it has direct low-latency connection to the
memory contoller/bus.


Again, in the context of ZFS I don't believe data transport
is the big problem to solve.  I believe it is a kernel space API.
Do we have any indication any of the GPGPU vendors (NVIDIA/ATI/Intel)
will offer an API that can be called from kernel space?
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