[gcc r15-655] DSE: Fix ICE after allow vector type in get_stored_val

https://gcc.gnu.org/g:88b3f83238087cbe2aa2c51c6054796856f2fb94 commit r15-655-g88b3f83238087cbe2aa2c51c6054796856f2fb94 Author: Pan Li Date: Tue Apr 30 09:42:39 2024 +0800 DSE: Fix ICE after allow vector type in get_stored_val We allowed vector type for get_stored_val when read

[gcc r15-642] RISC-V: Implement IFN SAT_ADD for both the scalar and vector

https://gcc.gnu.org/g:34ed2b4593fa98b613632d0dde30b6ba3e7ecad9 commit r15-642-g34ed2b4593fa98b613632d0dde30b6ba3e7ecad9 Author: Pan Li Date: Fri May 17 18:49:46 2024 +0800 RISC-V: Implement IFN SAT_ADD for both the scalar and vector The patch implement the SAT_ADD in the riscv

[gcc r15-585] RISC-V: Cleanup some temporally files [NFC]

https://gcc.gnu.org/g:d477d683d5c6db90c80d348c795709ae6444ba7a commit r15-585-gd477d683d5c6db90c80d348c795709ae6444ba7a Author: Pan Li Date: Fri May 17 07:45:19 2024 +0800 RISC-V: Cleanup some temporally files [NFC] Just notice some temporally files under gcc/config/riscv,

[gcc r15-583] RISC-V: Enable vectorizable early exit testsuite

https://gcc.gnu.org/g:556e777298dac8574533935000c57335c5232921 commit r15-583-g556e777298dac8574533935000c57335c5232921 Author: Pan Li Date: Thu May 16 10:04:10 2024 +0800 RISC-V: Enable vectorizable early exit testsuite After we supported vectorizable early exit in RISC-V, we

[gcc r15-582] RISC-V: Implement vectorizable early exit with vcond_mask_len

https://gcc.gnu.org/g:6c1de786e53a11150feb16ba990d0d6c6fd910db commit r15-582-g6c1de786e53a11150feb16ba990d0d6c6fd910db Author: Pan Li Date: Thu May 16 10:02:40 2024 +0800 RISC-V: Implement vectorizable early exit with vcond_mask_len After we support the loop lens for the

[gcc r15-578] Vect: Support loop len in vectorizable early exit

https://gcc.gnu.org/g:57f8a2f67c1536be23231808ab00613ab69193ed commit r15-578-g57f8a2f67c1536be23231808ab00613ab69193ed Author: Pan Li Date: Thu May 16 09:58:13 2024 +0800 Vect: Support loop len in vectorizable early exit This patch adds early break auto-vectorization support for

[gcc r15-577] Vect: Support new IFN SAT_ADD for unsigned vector int

https://gcc.gnu.org/g:d4dee347b3fe1982bab26485ff31cd039c9df010 commit r15-577-gd4dee347b3fe1982bab26485ff31cd039c9df010 Author: Pan Li Date: Wed May 15 10:14:06 2024 +0800 Vect: Support new IFN SAT_ADD for unsigned vector int For vectorize, we leverage the existing vect pattern

[gcc r15-576] Internal-fn: Support new IFN SAT_ADD for unsigned scalar int

https://gcc.gnu.org/g:52b0536710ff3f3ace72ab00ce9ef6c630cd1183 commit r15-576-g52b0536710ff3f3ace72ab00ce9ef6c630cd1183 Author: Pan Li Date: Wed May 15 10:14:05 2024 +0800 Internal-fn: Support new IFN SAT_ADD for unsigned scalar int This patch would like to add the middle-end

[gcc r15-442] RISC-V: Fix format issue for trailing operator [NFC]

https://gcc.gnu.org/g:b6dc8464e613d1da2b28235bbd2f9c3fd4bc386b commit r15-442-gb6dc8464e613d1da2b28235bbd2f9c3fd4bc386b Author: Pan Li Date: Tue May 14 09:38:55 2024 +0800 RISC-V: Fix format issue for trailing operator [NFC] This patch would like to fix below format issue of

[gcc r15-435] RISC-V: Bugfix ICE for RVV intrinisc vfw on _Float16 scalar

https://gcc.gnu.org/g:41b3cf262e61aee9d26380f1c820e0eaae740f50 commit r15-435-g41b3cf262e61aee9d26380f1c820e0eaae740f50 Author: Pan Li Date: Sat May 11 15:25:28 2024 +0800 RISC-V: Bugfix ICE for RVV intrinisc vfw on _Float16 scalar For the vfw vx format RVV intrinsic, the scalar

[gcc r15-342] RISC-V: Make full-vec-move1.c test robust for optimization

https://gcc.gnu.org/g:b1520d2260c5e0cfcd7a4354fab70f66e2912ff2 commit r15-342-gb1520d2260c5e0cfcd7a4354fab70f66e2912ff2 Author: Pan Li Date: Thu May 9 10:56:46 2024 +0800 RISC-V: Make full-vec-move1.c test robust for optimization During investigate the support of early break

[gcc r14-10145] RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885]

https://gcc.gnu.org/g:d40073be96ea24c7eace7141c4e0fed50077d2b0 commit r14-10145-gd40073be96ea24c7eace7141c4e0fed50077d2b0 Author: Pan Li Date: Sat Apr 27 20:24:04 2024 +0800 RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885] When we build with isl, there will

[gcc r15-45] RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885]

https://gcc.gnu.org/g:add51a2514a39978dc66976a8974f8435c86168f commit r15-45-gadd51a2514a39978dc66976a8974f8435c86168f Author: Pan Li Date: Sat Apr 27 20:24:04 2024 +0800 RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885] When we build with isl, there will be

[gcc r14-10118] RISC-V: Add test cases for insn does not satisfy its constraints [PR114714]

https://gcc.gnu.org/g:af7d981ba40f145256f6f6d3409451e8fa647f75 commit r14-10118-gaf7d981ba40f145256f6f6d3409451e8fa647f75 Author: Pan Li Date: Thu Apr 25 15:04:02 2024 +0800 RISC-V: Add test cases for insn does not satisfy its constraints [PR114714] We have one ICE when RVV

[gcc r14-10117] RISC-V: Add early clobber to the dest of vwsll

https://gcc.gnu.org/g:10ad46bc191f8aa90b0d7b00963bfd52c6d7b09c commit r14-10117-g10ad46bc191f8aa90b0d7b00963bfd52c6d7b09c Author: Pan Li Date: Thu Apr 25 08:55:08 2024 +0800 RISC-V: Add early clobber to the dest of vwsll We missed the existing early clobber for the dest operand

[gcc r14-10113] RISC-V: Add xfail test case for highpart register overlap of vwcvt

https://gcc.gnu.org/g:d44c2052c59545731edcf7f99a32bcef3b0415b6 commit r14-10113-gd44c2052c59545731edcf7f99a32bcef3b0415b6 Author: Pan Li Date: Wed Apr 24 23:09:24 2024 +0800 RISC-V: Add xfail test case for highpart register overlap of vwcvt We reverted below patch for register

[gcc r14-10108] Revert "RISC-V: Support highpart register overlap for vwcvt"

https://gcc.gnu.org/g:bc17a92380ff89b47b5bdc54d44368174d97d2df commit r14-10108-gbc17a92380ff89b47b5bdc54d44368174d97d2df Author: Pan Li Date: Wed Apr 24 19:20:39 2024 +0800 Revert "RISC-V: Support highpart register overlap for vwcvt" This reverts commit

[gcc r14-10103] RISC-V: Add xfail test case for highpart overlap of vext.vf

https://gcc.gnu.org/g:f952745943c2e9fbb2df32d2f2b037669d3fc50f commit r14-10103-gf952745943c2e9fbb2df32d2f2b037669d3fc50f Author: Pan Li Date: Wed Apr 24 10:39:25 2024 +0800 RISC-V: Add xfail test case for highpart overlap of vext.vf We reverted below patch for register group

[gcc r14-10102] Revert "RISC-V: Support highpart overlap for vext.vf"

https://gcc.gnu.org/g:8bcefc2d5fb0d8f8f9671fd830132b4e655c44b4 commit r14-10102-g8bcefc2d5fb0d8f8f9671fd830132b4e655c44b4 Author: Pan Li Date: Wed Apr 24 10:46:28 2024 +0800 Revert "RISC-V: Support highpart overlap for vext.vf" This reverts commit

[gcc r14-10081] RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

https://gcc.gnu.org/g:2a8187e0a1cf5fb5d1adcb5a2a2b579a80215202 commit r14-10081-g2a8187e0a1cf5fb5d1adcb5a2a2b579a80215202 Author: Pan Li Date: Mon Apr 22 21:20:02 2024 +0800 RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1 After we reverted below 2 commits,

[gcc r14-10074] Revert "RISC-V: Rename vconstraint into group_overlap"

https://gcc.gnu.org/g:cacc55a4c0be8d0bc7417b6a28924eadbbe428e3 commit r14-10074-gcacc55a4c0be8d0bc7417b6a28924eadbbe428e3 Author: Pan Li Date: Mon Apr 22 20:45:40 2024 +0800 Revert "RISC-V: Rename vconstraint into group_overlap" This reverts commit

[gcc r14-10073] Revert "RISC-V: Robostify the W43, W86, W87 constraint enabled attribute"

https://gcc.gnu.org/g:b78c88438cf3672987736edc013ffc0b20e879f7 commit r14-10073-gb78c88438cf3672987736edc013ffc0b20e879f7 Author: Pan Li Date: Mon Apr 22 20:44:38 2024 +0800 Revert "RISC-V: Robostify the W43, W86, W87 constraint enabled attribute" This reverts commit

[gcc r14-10070] RISC-V: Add xfail test case for highpart overlap floating-point widen insn

https://gcc.gnu.org/g:b991193eb8a79ec7562f3de3df866df9f041015a commit r14-10070-gb991193eb8a79ec7562f3de3df866df9f041015a Author: Pan Li Date: Mon Apr 22 16:07:36 2024 +0800 RISC-V: Add xfail test case for highpart overlap floating-point widen insn We reverted below patch for

[gcc r14-10069] Revert "RISC-V: Support highpart overlap for floating-point widen instructions"

https://gcc.gnu.org/g:4df96b4ec788f2d588febf3555685f2700b932b3 commit r14-10069-g4df96b4ec788f2d588febf3555685f2700b932b3 Author: Pan Li Date: Mon Apr 22 16:25:57 2024 +0800 Revert "RISC-V: Support highpart overlap for floating-point widen instructions" This reverts commit

[gcc r14-10068] RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW

https://gcc.gnu.org/g:a367b99f916cb7d2d673180ace640096fd118950 commit r14-10068-ga367b99f916cb7d2d673180ace640096fd118950 Author: Pan Li Date: Mon Apr 22 15:36:59 2024 +0800 RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW Update in v2: * Add

[gcc r14-10067] Revert "RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW"

https://gcc.gnu.org/g:9257c7a72059aba0df1684a0722c4d1538cbb6d4 commit r14-10067-g9257c7a72059aba0df1684a0722c4d1538cbb6d4 Author: Pan Li Date: Mon Apr 22 15:39:45 2024 +0800 Revert "RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW" This reverts commit

[gcc r14-10065] RISC-V: Add xfail test case for highest-number regno ternary overlap

https://gcc.gnu.org/g:c7506847c020ad34eff248ab715eae238b9d1ed3 commit r14-10065-gc7506847c020ad34eff248ab715eae238b9d1ed3 Author: Pan Li Date: Mon Apr 22 14:32:25 2024 +0800 RISC-V: Add xfail test case for highest-number regno ternary overlap We reverted below patch for register

[gcc r14-10064] Revert "RISC-V: Support highest-number regno overlap for widen ternary"

https://gcc.gnu.org/g:cc46b6d4f3b4edc832a319ebf5053131dada3c8c commit r14-10064-gcc46b6d4f3b4edc832a319ebf5053131dada3c8c Author: Pan Li Date: Mon Apr 22 14:10:02 2024 +0800 Revert "RISC-V: Support highest-number regno overlap for widen ternary" This reverts commit

[gcc r14-10063] RISC-V: Add xfail test case for widening register overlap of vf4/vf8

https://gcc.gnu.org/g:c4fdbdac1226787b4d33046f0be189a24dac468e commit r14-10063-gc4fdbdac1226787b4d33046f0be189a24dac468e Author: Pan Li Date: Mon Apr 22 10:11:25 2024 +0800 RISC-V: Add xfail test case for widening register overlap of vf4/vf8 We reverted below patch for register

[gcc r14-10062] Revert "RISC-V: Support widening register overlap for vf4/vf8"

https://gcc.gnu.org/g:ec78916bb37bec0cd3ede5c6263387345ce16f94 commit r14-10062-gec78916bb37bec0cd3ede5c6263387345ce16f94 Author: Pan Li Date: Mon Apr 22 09:26:04 2024 +0800 Revert "RISC-V: Support widening register overlap for vf4/vf8" This reverts commit

[gcc r14-10061] RISC-V: Add xfail test case for highpart register overlap of vx/vf widen

https://gcc.gnu.org/g:338640fbee2977485efb6ff0f1d3c7c8220074ad commit r14-10061-g338640fbee2977485efb6ff0f1d3c7c8220074ad Author: Pan Li Date: Sun Apr 21 12:34:19 2024 +0800 RISC-V: Add xfail test case for highpart register overlap of vx/vf widen We reverted below patch for

[gcc r14-10057] Revert "RISC-V: Support highpart register overlap for widen vx/vf instructions"

https://gcc.gnu.org/g:ef2392236ec629351496d7f299d6a0956080e4d9 commit r14-10057-gef2392236ec629351496d7f299d6a0956080e4d9 Author: Pan Li Date: Sun Apr 21 09:37:00 2024 +0800 Revert "RISC-V: Support highpart register overlap for widen vx/vf instructions" This reverts commit

[gcc r14-10056] RISC-V: Add xfail test case for incorrect overlap on v0

https://gcc.gnu.org/g:d37b34fe82e6e19e80ec9c46400f63fa90ba5255 commit r14-10056-gd37b34fe82e6e19e80ec9c46400f63fa90ba5255 Author: Pan Li Date: Sat Apr 20 22:43:13 2024 +0800 RISC-V: Add xfail test case for incorrect overlap on v0 We reverted below patch for register group

[gcc r14-10054] Revert "RISC-V: Fix overlap group incorrect overlap on v0"

https://gcc.gnu.org/g:3afcb04bd7d444b4c6547ad98668c2a6a7f37a21 commit r14-10054-g3afcb04bd7d444b4c6547ad98668c2a6a7f37a21 Author: Pan Li Date: Sat Apr 20 22:37:56 2024 +0800 Revert "RISC-V: Fix overlap group incorrect overlap on v0" This reverts commit

[gcc r14-10052] RISC-V: Add xfail test case for wv insn highest overlap

https://gcc.gnu.org/g:1690e47e101c1e273b1ee052de21d5214257c13a commit r14-10052-g1690e47e101c1e273b1ee052de21d5214257c13a Author: Pan Li Date: Sat Apr 20 13:05:52 2024 +0800 RISC-V: Add xfail test case for wv insn highest overlap We reverted below patch for wv insn overlap, add

[gcc r14-10051] Revert "RISC-V: Support highest overlap for wv instructions"

https://gcc.gnu.org/g:f5447eae72f11d9bfbb403183fd282918c0445c6 commit r14-10051-gf5447eae72f11d9bfbb403183fd282918c0445c6 Author: Pan Li Date: Sat Apr 20 09:42:57 2024 +0800 Revert "RISC-V: Support highest overlap for wv instructions" This reverts commit

[gcc r14-10050] RISC-V: Add xfail test case for wv insn register overlap

https://gcc.gnu.org/g:9f10005dbc9b660465ec4a9640bcbdcc1e5171c3 commit r14-10050-g9f10005dbc9b660465ec4a9640bcbdcc1e5171c3 Author: Pan Li Date: Sat Apr 20 09:02:39 2024 +0800 RISC-V: Add xfail test case for wv insn register overlap We reverted below patch for wv insn overlap, add

[gcc r14-10049] Revert "RISC-V: Support one more overlap for wv instructions"

https://gcc.gnu.org/g:0cbeafe26513954b0aea3293d2f82d4863f10f1d commit r14-10049-g0cbeafe26513954b0aea3293d2f82d4863f10f1d Author: Pan Li Date: Sat Apr 20 08:29:38 2024 +0800 Revert "RISC-V: Support one more overlap for wv instructions" This reverts commit

[gcc r14-9936] RISC-V: Fix Werror=sign-compare in riscv_validate_vector_type

https://gcc.gnu.org/g:6e7e5943619a2c20d93fc7089c885483786558bc commit r14-9936-g6e7e5943619a2c20d93fc7089c885483786558bc Author: Pan Li Date: Fri Apr 12 16:38:18 2024 +0800 RISC-V: Fix Werror=sign-compare in riscv_validate_vector_type This patch would like to fix the

[gcc r14-9930] RISC-V: Bugfix ICE non-vector in TARGET_FUNCTION_VALUE_REGNO_P

https://gcc.gnu.org/g:dc51a6428f6d8e5a57b8b1bf559145288e87660b commit r14-9930-gdc51a6428f6d8e5a57b8b1bf559145288e87660b Author: Pan Li Date: Fri Apr 12 11:12:24 2024 +0800 RISC-V: Bugfix ICE non-vector in TARGET_FUNCTION_VALUE_REGNO_P This patch would like to fix one ICE when

[gcc r14-9909] RISC-V: Remove -Wno-psabi for test build option [NFC]

https://gcc.gnu.org/g:f3fdcf4a37a7be07f2acbf5c8ed5e3399440a0ef commit r14-9909-gf3fdcf4a37a7be07f2acbf5c8ed5e3399440a0ef Author: Pan Li Date: Thu Apr 11 11:42:40 2024 +0800 RISC-V: Remove -Wno-psabi for test build option [NFC] Just notice there are some test case still have

[gcc r14-9908] RISC-V: Bugfix ICE for the vector return arg in mode switch

https://gcc.gnu.org/g:e40a3d86511efcea71e9eadde8fb9f96be52f790 commit r14-9908-ge40a3d86511efcea71e9eadde8fb9f96be52f790 Author: Pan Li Date: Thu Apr 11 09:39:44 2024 +0800 RISC-V: Bugfix ICE for the vector return arg in mode switch This patch would like to fix a ICE in mode sw

[gcc r14-9828] RISC-V: Refine the error msg for RVV intrinisc required ext

https://gcc.gnu.org/g:7d051f7d45789e1442d26c07bfc5e7fb77433b87 commit r14-9828-g7d051f7d45789e1442d26c07bfc5e7fb77433b87 Author: Pan Li Date: Mon Apr 8 12:33:05 2024 +0800 RISC-V: Refine the error msg for RVV intrinisc required ext The RVV intrinisc API has sorts of required

[gcc r14-9731] RISC-V: Fix misspelled term builtin in error message

https://gcc.gnu.org/g:b313baba57f7e09f66b603e1e30dd4b48800693f commit r14-9731-gb313baba57f7e09f66b603e1e30dd4b48800693f Author: Pan Li Date: Sat Mar 30 20:03:18 2024 +0800 RISC-V: Fix misspelled term builtin in error message This patch would like to fix below misspelled term in

[gcc r14-9730] RISC-V: Fix one unused varable in riscv_subset_list::parse

https://gcc.gnu.org/g:46eb34a75a9d004ce776bba382fe8af0978cace7 commit r14-9730-g46eb34a75a9d004ce776bba382fe8af0978cace7 Author: Pan Li Date: Sat Mar 30 21:32:06 2024 +0800 RISC-V: Fix one unused varable in riscv_subset_list::parse This patch would like to fix one unused variable

[gcc r14-9651] RISC-V: Allow RVV intrinsic when function target("arch=+v")

https://gcc.gnu.org/g:5cab64a9cfb93fb0e246a25e3fdc7b664afb774e commit r14-9651-g5cab64a9cfb93fb0e246a25e3fdc7b664afb774e Author: Pan Li Date: Mon Mar 25 14:22:31 2024 +0800 RISC-V: Allow RVV intrinsic when function target("arch=+v") This patch would like to allow the RVV

[gcc r14-9616] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV

https://gcc.gnu.org/g:47de95d801c6899033c303b1fe642feb0489994f commit r14-9616-g47de95d801c6899033c303b1fe642feb0489994f Author: Pan Li Date: Fri Mar 22 14:43:47 2024 +0800 RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV This patch would like to introduce one new

[gcc r14-9605] RISC-V: Bugfix function target attribute pollution

https://gcc.gnu.org/g:9941f0295a14659e25260458efd2e46a68ad0342 commit r14-9605-g9941f0295a14659e25260458efd2e46a68ad0342 Author: Pan Li Date: Tue Mar 19 09:43:24 2024 +0800 RISC-V: Bugfix function target attribute pollution This patch depends on below ICE fix.

[gcc r14-9604] RISC-V: Bugfix ICE for __attribute__((target("arch=+v"))

https://gcc.gnu.org/g:d3c24e9e55a7cf18df313a8b32b6de4b3ba81013 commit r14-9604-gd3c24e9e55a7cf18df313a8b32b6de4b3ba81013 Author: Pan Li Date: Mon Mar 18 11:21:29 2024 +0800 RISC-V: Bugfix ICE for __attribute__((target("arch=+v")) This patch would like to fix one ICE for

[gcc r14-9436] RISC-V: Fix some code style issue(s) in riscv-c.cc [NFC]

https://gcc.gnu.org/g:cdf0c6604d03afd7f544dd8bd5d43d9ded059ada commit r14-9436-gcdf0c6604d03afd7f544dd8bd5d43d9ded059ada Author: Pan Li Date: Tue Mar 12 15:01:57 2024 +0800 RISC-V: Fix some code style issue(s) in riscv-c.cc [NFC] Notice some code style issue(s) when add

[gcc r14-9418] VECT: Fix ICE for vectorizable LD/ST when both len and store are enabled

https://gcc.gnu.org/g:993c6de642ffeb2867edbe80ff2a72c0a2eb604e commit r14-9418-g993c6de642ffeb2867edbe80ff2a72c0a2eb604e Author: Pan Li Date: Sun Mar 10 11:02:35 2024 +0800 VECT: Fix ICE for vectorizable LD/ST when both len and store are enabled This patch would like to fix one