Hello, I'm not as expert as Andrew in all the speculation stuff, but I will try to provide some feedback.
On Tue, Feb 14, 2023 at 05:10:42PM +0100, Jan Beulich wrote: > In order to be able to defer the context switch IBPB to the last > possible point, add logic to the exit-to-guest paths to issue the > barrier there, including the "IBPB doesn't flush the RSB/RAS" > workaround. Since alternatives, for now at least, can't nest, emit JMP > to skip past both constructs where both are needed. This may be more > efficient anyway, as the sequence of NOPs is pretty long. Could you elaborate on the reason why deferring the IBPB to the exit to guest path is helpful? So far it just seem to make the logic more complex without nay justification (at least in the changelog). > > As with all other conditional blocks on exit-to-guest paths, no > Spectre-v1 protections are necessary as execution will imminently be > hitting a serialising event. > > Signed-off-by: Jan Beulich <jbeul...@suse.com> > --- > I have to admit that I'm not really certain about the placement of the > IBPB wrt the MSR_SPEC_CTRL writes. For now I've simply used "opposite of > entry". Maybe it would easier to just add the MSR_PRED_CMD PRED_CMD_IBPB write to the vmcs MSR load list? It's a one-time only AFAICT, as you would only want to do this for context-switch AFAICT. Thanks, Roger.
