On Fri Oct 19 10:01:11 EDT 2012, 9f...@hamnavoe.com wrote: > > could you explain the ccmalloc trick? > > "cache coherent malloc" - not really a trick, just a way to > ensure SD buffers are cache-aligned and occupy an integral > number of cache lines, to avoid embarrassment when doing > dma on ARM (which bypasses the cache). It costs a bit of > space but saves copying.
that's what i thought. we ran into this problem and decided that it was easiest to just cacheline-align everything in malloc, at the obvious expense of a tiny bit of memory. the reason for this was we were using a few kw devices that could get just about any chunk of malloc'd memory. ideally we would have written a kw-specific malloc with tracking segregated from the managed memory. - erik
