On Fri Oct 19 17:31:50 EDT 2012, charles.fors...@gmail.com wrote: > I think it's better to specify memory that must have special cache > properties, rather than assuming that everything is.
this depends on the ratio of memory that has special cache properties to the memory that doesn't. if you have devices like the kirkwood that can do dma, pci transfers, crcs, etc and it turns out that you can't predict ahead of time what memory you'd like to transfer, then, making a small concession in malloc might make sense. Block*s (well at least the buffer) needs to be special because the ethernet on the marvell is not cache coherent. - erik
