http://bugzilla.kernel.org/show_bug.cgi?id=9528





------- Comment #82 from [EMAIL PROTECTED]  2008-01-08 20:03 -------
(In reply to comment #81)
> The other unknown is if this chipset and its SMM BIOS code
> ties together any of the ehci and ohci functionality,
> or if they are totally independent.

I suspect they are independent. Disabling the SMI trap call on the suspend path
didn't appear to break anything in my original testing.

A cursory retest now (disabling all calls to the trap in a custom DSDT) didn't
cause anything to break here that I could see.

> Re: ohci (USB0)
> Yes, the way I read the DSDT, we should put it into D3.
> It would be an interesting experiment if putting it into D2
> instead had an effect.

I've hacked drivers/usb/core/hcd-pci.c to try this, but the result is the same
- the system still hangs on suspend.

We really cannot let this device be in any mode other than D1 when calling
_PTS().

So can we now get Rafael's suspend reordering patches into the ACPI tree, and
I'll handle getting the CK804 USB autosuspend disabling side of this sorted?


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