Hi, > There isn't much that an MIMD machine can do better than a similar-sized > SIMD machine.
Hey, that's just not true. There are loads of math theorems disproving this assertion... >> >> OO and generic design patterns do buy you *something* ... > > > OO is often impossible to vectorize. The point is that we've used OO design to wrap up all processor-intensive code inside specific objects, which could then be rewritten to be vector-processing friendly... > There is an 80-core chip due out any time now. Intel has had BIG problems > finding anything to run on them, so I suspect that they would be more than > glad to give you a few if you promise to do something with them. Indeed, AGI and physics simulation may be two of the app areas that have the easiest times making use of these 80-core chips... > I listened to an inter-processor communications plan for the 80 core chip > last summer, and it sounded SLOW - like there was no reasonable plan for > global memory. I haven't put in the time to assess this for myself > I suspect that your plan in effect requires FAST global > memory (to avoid crushing communications bottlenecks), True >and this is NOT > entirely simple on MIMD architectures. True also > My SIMD architecture will deliver equivalent global memory speeds of ~100x > the clock speed, which still makes it a high-overhead operation on a machine > that peaks out at ~20K operations per clock cycle. Well, we're writing our code to run on the hardware we have now, while making the design as flexible & modular as possible to as to minimize the pain and suffering that will be incurred if/when radically different hardware becomes the smartest option to use... ben g ------------------------------------------- agi Archives: https://www.listbox.com/member/archive/303/=now RSS Feed: https://www.listbox.com/member/archive/rss/303/ Modify Your Subscription: https://www.listbox.com/member/?member_id=8660244&id_secret=123753653-47f84b Powered by Listbox: http://www.listbox.com
