From: "Bitnun, Ethan" <ethan.bit...@amd.com>

The previous assumption that there will be an optimize_bandwidth call
following every prepare_bandwidth call was incorrect and caused small
inaccuracies in logging, as some info was only updated in later prepare
calls.

Signed-off-by: Ethan Bitnun <etbit...@amd.com>
Reviewed-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c 
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
index 358a83b1114b..7eecb3403f74 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
@@ -830,7 +830,7 @@ static void dcn32_update_clocks(struct clk_mgr 
*clk_mgr_base,
                dmcu->funcs->set_psr_wait_loop(dmcu,
                                clk_mgr_base->clks.dispclk_khz / 1000 / 7);
 
-       if (dc->config.enable_auto_dpm_test_logs && safe_to_lower) {
+       if (dc->config.enable_auto_dpm_test_logs) {
            dcn32_auto_dpm_test_log(new_clocks, clk_mgr, context);
        }
 }
-- 
2.43.0

Reply via email to