Add smn block to register access and callback interface definition to get smn base.
Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c | 11 +++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h | 13 +++++++++++++ 2 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c index a996ab1254a1..4f58e9e81670 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c @@ -283,6 +283,17 @@ void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v) adev->reg.pcie.port_wreg(adev, reg, v); } +uint64_t amdgpu_reg_get_smn_base64(struct amdgpu_device *adev, + enum amd_hw_ip_block_type block, + int die_inst) +{ + if (!adev->reg.smn.get_smn_base) { + dev_err_once(adev->dev, "SMN base address callback not set\n"); + return 0; + } + return adev->reg.smn.get_smn_base(adev, block, die_inst); +} + /* * register access helper functions. */ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h index dc0e81cef3b9..b3b941cc7b7c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h @@ -27,6 +27,8 @@ #include <linux/types.h> #include <linux/spinlock.h> +#include "amdgpu_ip.h" + struct amdgpu_device; typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device *, uint32_t); @@ -42,6 +44,9 @@ typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device *, uint32_t, uint32_t); typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t, uint32_t); +typedef uint64_t (*amdgpu_reg_get_smn_base64_t)(struct amdgpu_device *adev, + enum amd_hw_ip_block_type block, + int die_inst); struct amdgpu_reg_ind { spinlock_t lock; @@ -69,6 +74,10 @@ struct amdgpu_reg_pcie_ind { amdgpu_wreg_t port_wreg; }; +struct amdgpu_reg_smn_ext { + amdgpu_reg_get_smn_base64_t get_smn_base; +}; + struct amdgpu_reg_access { struct amdgpu_reg_ind smc; struct amdgpu_reg_ind uvd_ctx; @@ -77,6 +86,7 @@ struct amdgpu_reg_access { struct amdgpu_reg_ind se_cac; struct amdgpu_reg_ind_blk audio_endpt; struct amdgpu_reg_pcie_ind pcie; + struct amdgpu_reg_smn_ext smn; }; void amdgpu_reg_access_init(struct amdgpu_device *adev); @@ -109,6 +119,9 @@ void amdgpu_reg_pcie_ext_wr64(struct amdgpu_device *adev, uint64_t reg, uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg); void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v); +uint64_t amdgpu_reg_get_smn_base64(struct amdgpu_device *adev, + enum amd_hw_ip_block_type block, + int die_inst); uint32_t amdgpu_device_rreg(struct amdgpu_device *adev, uint32_t reg, uint32_t acc_flags); -- 2.49.0
