add append func for pmfw eeprom
Signed-off-by: Gangliang Xie <[email protected]>
---
.../gpu/drm/amd/ras/rascore/ras_eeprom_fw.c | 39 +++++++++++++++++++
.../gpu/drm/amd/ras/rascore/ras_eeprom_fw.h | 2 +
drivers/gpu/drm/amd/ras/rascore/ras_umc.c | 10 +++--
3 files changed, 48 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
index 66934f61bcf9..f7a6f2368530 100644
--- a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
@@ -220,3 +220,42 @@ bool ras_fw_eeprom_check_safety_watermark(struct
ras_core_context *ras_core)
return ret;
}
+
+int ras_fw_eeprom_append(struct ras_core_context *ras_core,
+ struct eeprom_umc_record *record, const u32 num)
+{
+ struct ras_fw_eeprom_control *control = &ras_core->ras_fw_eeprom;
+ int threshold_config = control->record_threshold_config;
+ int i, bad_page_count;
+
+ mutex_lock(&control->ras_tbl_mutex);
+
+ for (i = 0; i < num; i++) {
+ /* update bad channel bitmap */
+ if ((record[i].mem_channel <
BITS_PER_TYPE(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 <<
record[i].mem_channel))) {
+ control->bad_channel_bitmap |= 1 <<
record[i].mem_channel;
+ control->update_channel_flag = true;
+ }
+ }
+ control->ras_num_recs += num;
+
+ bad_page_count = ras_umc_get_badpage_count(ras_core);
+
+ if (threshold_config != 0 &&
+ bad_page_count > control->record_threshold_count) {
+ RAS_DEV_WARN(ras_core->dev,
+ "Saved bad pages %d reaches threshold value %d\n",
+ bad_page_count, control->record_threshold_count);
+
+ if ((threshold_config != WARN_NONSTOP_OVER_THRESHOLD) &&
+ (threshold_config != NONSTOP_OVER_THRESHOLD))
+ ras_core->is_rma = true;
+
+ /* ignore the -ENOTSUPP return value */
+ ras_core_event_notify(ras_core, RAS_EVENT_ID__DEVICE_RMA, NULL);
+ }
+
+ mutex_unlock(&control->ras_tbl_mutex);
+ return 0;
+}
diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
index 09632f1121f0..27507bb38135 100644
--- a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
@@ -68,5 +68,7 @@ int ras_fw_erase_ras_table(struct ras_core_context *ras_core,
uint32_t *result);
int ras_fw_eeprom_reset_table(struct ras_core_context *ras_core);
bool ras_fw_eeprom_check_safety_watermark(struct ras_core_context *ras_core);
+int ras_fw_eeprom_append(struct ras_core_context *ras_core,
+ struct eeprom_umc_record *record, const u32 num);
#endif
diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_umc.c
b/drivers/gpu/drm/amd/ras/rascore/ras_umc.c
index 4dae64c424a2..fd427fd59ecf 100644
--- a/drivers/gpu/drm/amd/ras/rascore/ras_umc.c
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_umc.c
@@ -479,9 +479,13 @@ static int ras_umc_save_bad_pages(struct ras_core_context
*ras_core)
save_count = data->count - eeprom_record_num;
/* only new entries are saved */
if (save_count > 0) {
- if (ras_eeprom_append(ras_core,
- &data->bps[eeprom_record_num],
- save_count)) {
+ if (ras_fw_eeprom_supported(ras_core))
+ ret = ras_fw_eeprom_append(ras_core,
&data->bps[eeprom_record_num],
+ save_count);
+ else
+ ret = ras_eeprom_append(ras_core,
&data->bps[eeprom_record_num],
+ save_count);
+ if (ret) {
RAS_DEV_ERR(ras_core->dev, "Failed to save EEPROM table
data!");
ret = -EIO;
goto exit;
--
2.34.1
